LTC2905CTS8#PBF Linear Technology, LTC2905CTS8#PBF Datasheet - Page 10

• Manufacturer Part Number: LTC2905CTS8#PBF
• Manufacturer: Linear Technology

Specifications of LTC2905CTS8#PBF

• Voltage Supervisor Type: Voltage Monitor
• Number Of Voltage Supervisors: 2
• Operating Supply Voltage (min): 1V
• Package Type: TSOT-23
• Operating Temperature Classification: Commercial
• Operating Temp Range: 0C to 70C
• Pin Count: 8
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

APPLICATIONS INFORMATION
LTC2904/LTC2905
Threshold Accuracy
Reset threshold accuracy is of the utmost importance in a
supply sensitive system. Ideally such a system should not
reset while supply voltages are within a specifi ed margin
below the rated nominal level. Both of the LTC2904/LTC2905
inputs have the same relative threshold accuracy. The
specifi cation for LTC2904/LTC2905 is ±1.5% of the pro-
grammed nominal input voltage (over the full operating
temperature range).
For example, when the LTC2904/LTC2905 are programmed
to handle a 5V input with 10% tolerance (S1 = S2 = V1 and
TOL = GND, refer to Table 1 and Table 2), it does not issue
a reset command when V1 is above 4.5V. The typical 10%
trip threshold is at 11.5% below the nominal input voltage
level. Therefore, the typical trip threshold for the 5V input
is 4.425V. With ±1.5% accuracy, the trip threshold range is
4.425V ±75mV over temperature (i.e. 10% to 13% below
5V). This implies that the monitored system must operate
reliably down to 4.35V over temperature.
The same system using a supervisor with only ±2.5%
accuracy needs to work reliably down to 4.25V (4.375V
±125mV) or 15% below 5V, requiring the monitored system
to work over a much wider operating voltage range.
In any supervisory application, supply noise riding on
the monitored DC voltage can cause spurious resets,
particularly when the monitored voltage is near the reset
threshold. A less desirable but common solution to this
problem is to introduce hysteresis around the nominal
threshold. Notice however, this hysteresis introduces an
error term in the threshold accuracy. Therefore, a ±2.5%
accurate monitor with ±1.0% hysteresis is equivalent to
a ±3.5% monitor with no hysteresis.
The LTC2904/LTC2905 takes a different approach to solve
this problem of supply noise causing spurious reset. The
fi rst line of defense against this spurious reset is a fi rst
order low pass fi lter at the output of the comparator. Thus,
the comparator output goes through a form of integration
before triggering the output logic. Therefore, any kind of
10
transient at the input of the comparator needs to be of
suffi cient magnitude and duration before it can trigger a
change in the output logic.
The second line of defense is the programmed delay time
tRST (200ms for LTC2904 and using an external capacitor
for LTC2905). This delay will eliminate the effect of any
supply noise whose frequency is above 1/t
and RST output.
When either V1 or V2 drops below its programmed thresh-
old, the RST pin asserts low (RST weakly pulls high). Then
when the supply recovers above the programmed thresh-
old, the reset-pulse-generator timer starts counting.
If the supply remains above the programmed threshold
when the timer fi nishes counting, the RST pin weakly
pulls high (RST asserts low). However, if the supply falls
below the programmed threshold any time during the
period when the timer is still counting, the timer resets
and it starts fresh when the supply next rises above the
programmed threshold.
Note that this second line of defense is only effective
for a rising supply and does not affect the sensitivity of
the system to a falling supply. Therefore, the fi rst line of
defense that works for both cases of rising and falling is
necessary. These two approaches prevent spurious reset
caused by supply noise without sacrifi cing the threshold
accuracy.
Selecting the Reset Timing Capacitor
The reset time-out period for LTC2905 is adjustable in order
to accommodate a variety of microprocessor applications.
Connecting a capacitor, C
ground sets the reset time-out period, t
formula determines the value of capacitor needed for a
particular reset time-out period:
For example, using a standard capacitor value of 22nF
would give a 22000/110 = 200ms delay.
C
TMR
= t
RST
• 110 • 10
–9
TMR
[F/s]
, between the TMR pin and
RST
RST
. The following
on the RST
29045fc