MCIMX31LVKN5C Freescale, MCIMX31LVKN5C Datasheet - Page 18
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MCIMX31LVKN5C
Manufacturer Part Number
MCIMX31LVKN5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX31LVKN5C.pdf
(122 pages)
Specifications of MCIMX31LVKN5C
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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1
2
Electrical Characteristics
Table 14
18
Retention
Typical column: TA = 25°C
Maximum column: TA = 70°C
Mode
Sleep
Deep
State
Wait
shows the core current consumption for 0°C to 70°C for Silicon Revision 2.0 for the MCIMX31.
• QVCC = 0.95 V
• ARM and L2 caches are power gated
• All PLLs are off, VCC = 1.4 V
• ARM is in well bias
• FPM is off
• 32 kHz input is on
• CKIH input is off
• CAMP is off
• TCK input is off
• All modules are off
• No external resistive loads
• RNGA oscillator is off
• QVCC and QVCC1 = 0.95 V
• L2 caches are power gated (QVCC4 = 0 V)
• All PLLs are off, VCC = 1.4 V
• ARM is in well bias
• FPM is off
• 32 kHz input is on
• CKIH input is off
• CAMP is off
• TCK input is off
• All modules are off
• No external resistive loads
• RNGA oscillator is off
• QVCC,QVCC1, and QVCC4 = 1.22 V
• ARM is in wait for interrupt mode
• MAX is active
• L2 cache is stopped but powered
• MCU PLL is on (532 MHz), VCC = 1.4 V
• USB PLL and SPLL are off, VCC = 1.4 V
• FPM is on
• CKIH input is on
• CAMP is on
• 32 kHz input is on
• All clocks are gated off
• All modules are off
• RNGA oscillator is off
• No external resistive loads
(QVCC1 2= QVCC4 = 0 V)
(by programming CGR[2:0] registers)
Table 14. Current Consumption for 0
Conditions
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
0.16
0.16
6.00
(Peripheral)
Typ
°
C to 70
QVCC
13.00 2.20 16.00 0.03 0.17
Max
2.50
2.50
°
C
1, 2
0.07
Typ
—
QVCC1
(ARM)
for Silicon Revision 2.0
Max
1.60
—
Typ
—
—
QVCC4
(L2)
Max
—
—
Freescale Semiconductor
+SVCC, +UVCC
FVCC, +MVCC,
0.02
0.02
3.60
Typ
(PLL)
Max
0.10
0.10
4.40
Unit
mA
mA
mA