MCIMX31LVKN5C Freescale, MCIMX31LVKN5C Datasheet - Page 40
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MCIMX31LVKN5C
Manufacturer Part Number
MCIMX31LVKN5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX31LVKN5C.pdf
(122 pages)
Specifications of MCIMX31LVKN5C
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Electrical Characteristics
40
1
2
NF10 Write Cycle Time
NF11 NFWE Hold Time
NF12 Ready to NFRE Low
NF13 NFRE Pulse Width
NF14 READ Cycle Time
NF15 NFRE High Hold Time
NF16 Data Setup on READ
NF17 Data Hold on READ
NF1
NF2
NF3
NF4
NF5
NF6
NF7
NF8
NF9
The flash clock maximum frequency is 50 MHz.
Subject to DPLL jitter specification on
ID
NFCLE
NFCE
NFRE
NFRB
NFIO[15:0]
NFCLE Setup Time
NFCLE Hold Time
NFCE Setup Time
NFCE Hold Time
NF_WP Pulse Width
NFALE Setup Time
NFALE Hold Time
Data Setup Time
Data Hold Time
Parameter
Figure 26. Read Data Latch Cycle Timing DIagram
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
NF12
Table 32. NFC Timing Parameters
Symbol
tREH
tDSR
tDHR
tCLS
tCLH
tALH
tALS
tWC
tWH
tWP
tCS
tCH
tDS
tDH
tRR
tRP
tRC
Table 31, "DPLL Specifications," on page
Data from NF
NF13
T–1.0 ns
T–2.0 ns
T–1.0 ns
T–2.0 ns
T–3.0 ns
T–5.0 ns
T = NFC Clock Cycle
NF16
1.5T
Min
6T
2T
NF14
T
T
0.5T–2.5 ns
T–1.5 ns
T–2.5 ns
Timing
N/A
N/A
2T
NF17
NF15
Max
—
—
—
—
—
—
—
—
—
—
—
2
1
NFC Clock
Example Timing for
12.5
Min
180
29
28
29
28
30
27
30
25
45
60
10
0
T = 30 ns
37.
28.5
27.5
60
≈
33 MHz
Freescale Semiconductor
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns