MCIMX31VKN5 Freescale, MCIMX31VKN5 Datasheet - Page 33

• Manufacturer Part Number: MCIMX31VKN5
• Manufacturer: Freescale

Specifications of MCIMX31VKN5

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
1
2. Make ton and toff big enough to avoid bus contention
There is a special timing requirement in the ATA host that requires the internal DIOW to go only high 3 clocks after the last
active edge on the DSTROBE signal. The equation given on this line tries to capture this constraint.
Parameter
tdzfs
tzah
ATA
tack
tenv
tcyc
tcvh
tmli
tds
tdh
trp
—
—
Parameter
Figure
Figure
Figure 17
from
tmli1
tdzfs
tdh1
tack
tenv
tds1
tx1
tzah
tcvh
tc1
ton
toff
trp
Figure 17. UDMA In Device Terminates Transfer Timing Diagram
1
15,
16,
tds – (tskew3) – ti_ds > 0
(tcyc – tskew) > T
trp (min) = time_rp * T – (tskew1 + tskew2 + tskew6)
tmli1 (min) = (time_mlix + 0.4) * T
tack (min) = (time_ack * T) – (tskew1 + tskew2)
tenv (min) = (time_env * T) – (tskew1 + tskew2)
tenv (max) = (time_env * T) + (tskew1 + tskew2)
tdh – (tskew3) – ti_dh > 0
(time_rp * T) – (tco + tsu + 3T + 2 *tbuf + 2*tcable2) > trfs (drive)
tzah (min) = (time_zah + 0.4) * T
tdzfs = (time_dzfs * T) – (tskew1 + tskew2)
tcvh = (time_cvh *T) – (tskew1 + tskew2)
ton = time_on * T – tskew1
toff = time_off * T – tskew1
Table 28. UDMA In Burst Timing Parameters
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Description
Electrical Characteristics
should be low enough
Controlling Variable
tskew3, ti_ds, ti_dh
T big enough
time_mlix
time_dzfs
time_ack
time_env
time_zah
time_cvh
time_rp
time_rp
—
33