SAA7326H/E/M2B,557 NXP Semiconductors, SAA7326H/E/M2B,557 Datasheet - Page 6

SAA7326H/E/M2B,557

Manufacturer Part Number
SAA7326H/E/M2B,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7326H/E/M2B,557

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
6
2000 Jun 26
HFREF
HFIN
ISLICE
V
V
I
V
D1
D2
D3
D4
R1
R2
V
CROUT
CRIN
V
LN
LP
V
V
RN
RP
SELPLL
TEST1
CL16
DATA
WCLK
SCLK
EF
TEST2
KILL
V
V2/V3
WCLI
SDI
SCLI
RESET
SDA
SCL
ref
SSA1
DDA1
RIN
SSA2
DDA2
neg
pos
SSD1
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10 II)
PINNING
SYMBOL
14
17
33
PIN
4
5
10
11
12
13
15
16
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
34
35
36
37
38
39
40
1
2
3
6
7
8
9
(1)
(1)
(1)
(1)
(1)
analog ground 1
analog supply voltage 1
reference current output
reference voltage for servo ADCs
unipolar current input 1 (central diode signal input)
unipolar current input 2 (central diode signal input)
unipolar current input 3 (central diode signal input)
unipolar current input 4 (central diode signal input)
unipolar current input 1 (satellite diode signal input)
unipolar current input 2 (satellite diode signal input)
analog ground 2
crystal/resonator input
analog supply voltage 2
DAC left channel differential negative output
DAC left channel differential positive output
serial d4(1) data output (3-state)
digital ground 1
versatile I/O: versatile input 2 or versatile output 3 (open-drain)
word clock input (for data loopback to DAC)
serial data input (for data loopback to DAC)
serial bit clock input (for data loopback to DAC)
microcontroller interface data I/O line (I
microcontroller interface clock line input (I
comparator common mode input
comparator signal input
current feedback output from data slicer
crystal/resonator output
DAC negative reference input
DAC positive reference input
DAC right channel differential negative output
DAC right channel differential positive output
selects whether internal clock multiplier PLL is used
test control input 1 (this pin should be tied LOW)
16.9344 MHz system clock output
word clock output (3-state)
serial bit clock output (3-state)
C2 error flag output (3-state)
test control input 2 (this pin should be tied LOW)
kill output (programmable; open-drain)
power-on reset input (active LOW)
6
DESCRIPTION
2
C-bus; open-drain output)
2
C-bus)
Product specification
SAA7326

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