MC94MX21DVKN3 Freescale, MC94MX21DVKN3 Datasheet - Page 21

• Manufacturer Part Number: MC94MX21DVKN3
• Manufacturer: Freescale

Specifications of MC94MX21DVKN3

• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

can write data to BMI RxFIFO anytime as CPU or DMA can move data out from RxFIFO much faster
than the BMI interface. Overflow interrupt is generated if RxFIFO overflow is detected. Once this
happens, the new coming data is ignored.
3.8.1.1.1
Figure 6
On each rising edge of BMI_CLK/CS BMI checks the BMI_WRITE logic level to determine if the current
cycle is a read cycle. It puts data into the data bus and enables the data out on the rising edge of BMI_CLK/
CS if BMI_WRITE is logic high. The BMI_READ_REQ is negated one hclk cycle after the BMI_CLK/
CS rising edge of last data read. The MMD cannot issues read command when BMI_READ_REQ is low
(no data in TxFIFO).
Note: All the timings assume that the hclk is running at 133 MHz.
Note: The MIN period of the 1T is assumed that MMD latch data at falling edge.
Note: If the MMD latch data at next rising edge, the ideally max clock can be as much as double, but because the BMI data pads
are slow pads and it max frequency can only up to 18MHz, the max clock frequency can only up to 36 MHz.
Freescale Semiconductor
BMI_READ_REQ
BMI_CLK/CS
BMI_D[15:0]
BMI_WRITE
shows the MMD read BMI timing when the MMD drives clock.
transfer data setup time
transfer data hold time
read_req hold time
MMD Read BMI Timing
write setup time
Clock period
Item
(MMD_MODE_SEL=1, MASTER_MODE_SEL=0,MMD_CLKOUT=0)
Table 13. MMD Read BMI Timing Table when MMD Drives Clock
Figure 6. MMD (ATI) Drives Clock, MMD Read BMI Timing
MC94MX21 Technical Data, Rev. 1.5
Symbol
Tds
Tdh
Trh
1T
Ts
Tds
1T
Ts
TxD1
Minimum
Tdh
TxD2
33.3
11
6
6
6
Typical
–
–
–
–
-
Maximum
Trh
24
14
14
–
–
Last TxD
Unit
Specifications
ns
ns
ns
ns
ns
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