SAA7111AHZV4 NXP Semiconductors, SAA7111AHZV4 Datasheet - Page 32

• Manufacturer Part Number: SAA7111AHZV4
• Manufacturer: NXP Semiconductors

Specifications of SAA7111AHZV4

• Pin Count: 64
• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
1998 May 15
handbook, full pagewidth
Enhanced Video Input Processor (EVIP)
(1) ODD is switched to output RTS0 via I
(2) Additional VREF positions can be achieved via I
The luminance peaking and the chrominance trap are bypassed during VREF = 0 if I
The chrominance delay line (chrominance-comb filter for NTSC, phase error correcting for PAL) is disabled during VREF = 0.
Fig.24 Vertical timing diagram for 50 Hz [nominal input signal VNL in normal mode (VNOI = 00b)].
VREF
VREF
VREF
VREF
input CVBS
HREF
VS
RTS0 (ODD)
input CVBS
HREF
VS
RTS0 (ODD)
VRLN = 1
VRLN = 0
VRLN = 0
VRLN = 1
(1)
622
(1)
310
(2)
(2)
(2)
(2)
623
311
624
312
2
C-bus bit RTSE0 = 0.
625
313
2
C-bits VCTR1 and VCTR0 (see Fig.9).
1
314
2
315
(a) 1st field
(b) 2nd field
32
3
316
4
317
2
C-bus bit VBLB is set to logic 1.
5
318
6
319
7
320
77 x 2/LLC
8
335
535 x 2/LLC
22
336
Product specification
SAA7111A
23
337
MGG069