IPSERIALLITE Altera, IPSERIALLITE Datasheet - Page 91
IPSERIALLITE
Manufacturer Part Number
IPSERIALLITE
Description
Manufacturer
Altera
Datasheet
1.IPSERIALLITE.pdf
(120 pages)
Specifications of IPSERIALLITE
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Specifications
Altera Corporation
August 2005
PLL bandwidth settings are made in the Parameterize - SerialLite
MegaCore function wizard. The -3-dB frequencies for these settings can
vary due to the non-linear nature and frequency dependencies of the
circuit. You can adjust the bandwidth to fine tune and customize the
performance on specific systems.
transmitter and receiver PLL bandwidth settings.
Transmitter Termination
The Stratix GX transmitter buffer allows you to program the on-chip
differential termination resistor (see
are current-mode drivers, so the output differential voltage (V
depends on the transmitter termination value. The Parameterize -
SerialLite MegaCore function wizard allows you to make this selection.
Output Differential Voltage (V
Stratix GX transceivers allow you to customize the output differential
voltage (V
requirements. V
Low (default)
High
Low (default)
Medium
High
100 Ω (default)
120 Ω
150 Ω
Table 3–43. Transmitter PLL Bandwidth Options
Table 3–44. Receiver PLL Bandwidth Settings
Table 3–45. Transmitter Termination Options
MegaCore Function Version 1.1.0
OD
) to handle different length, backplane, and receiver
OD
is illustrated in
OD
)
SerialLite MegaCore Function User Guide
Tables 3–43
Figure
Table
3–33.
3–45). The transmitter buffers
and
3–44
show the
OD
)
3–59
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