AT94K05AL-25DQU Atmel, AT94K05AL-25DQU Datasheet - Page 4

• Manufacturer Part Number: AT94K05AL-25DQU
• Manufacturer: Atmel

Specifications of AT94K05AL-25DQU

• Device System Gates: 5000
• Propagation Delay Time: 12.1ns
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temperature Classification: Industrial
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Compliant

2. FPGA Core
2.1
2.2
2.3
4
Fast, Flexible and Efficient SRAM
Fast, Efficient Array and Vector Multipliers
Cache Logic Design
AT94KAL Series FPSLIC
The embedded AVR core achieves throughputs approaching 1 MIPS per MHz by executing
powerful instructions in a single-clock cycle, and allows system designers to optimize power
consumption versus processing speed. The AVR core is based on an enhanced RISC architec-
ture that combines a rich instruction set with 32 general-purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code-efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers at the same clock frequency. The AVR executes out of on-chip
SRAM. Both the FPGA configuration SRAM and the AVR instruction code SRAM can be auto-
matically loaded at system power-up using Atmel’s In-System Programmable (ISP) AT17 Series
EEPROM Configuration Memories.
State-of-the-art FPSLIC design tools, System Designer, were developed in conjunction with the
FPSLIC architecture to help reduce overall time-to-market by integrating microcontroller devel-
opment and debug, FPGA development and Place and Route, and complete system
co-verification in one easy-to-use software tool.
Table 1-2.
The AT40K core can be used for high-performance designs, by implementing a variety of com-
pute-intensive arithmetic functions. These include adaptive finite impulse response (FIR) filters,
fast Fourier transforms (FFT), convolvers, interpolators, and discrete-cosine transforms (DCT)
that are required for video compression and decompression, encryption, convolution and other
multimedia applications.
The AT40K core offers a patented distributed 10 ns SRAM capability where the RAM can be
used without losing logic resources. Multiple independent, synchronous or asynchronous, dual-
port or single-port RAM functions (FIFO, scratch pad, etc.) can be created using Atmel’s macro
generator tool.
The AT40K cores patented 8-sided core cell with direct horizontal, vertical and diagonal cell-to-
cell connections implements ultra-fast array multipliers without using any busing resources. The
AT40K core’s Cache Logic capability enables a large number of design coefficients and vari-
ables to be implemented in a very small amount of silicon, enabling vast improvement in system
speed.
The AT40K FPGA core is capable of implementing Cache Logic (dynamic full/partial logic recon-
figuration, without loss of data, on-the-fly) for building adaptive logic and systems. As new logic
FPSLIC Device
AT94K05
AT94K10
AT94K40
FPSLIC Configuration Devices
FPSLIC Configuration
AT17LV256
AT17LV512
AT17LV010
Device
Configuration Data
226520 Bits
430488 Bits
815382 Bits
Spare Memory
233194 Bits
35624 Bits
93800 Bits
1138I–FPSLI–1/08