IP4338CX24/LF,135 NXP Semiconductors, IP4338CX24/LF,135 Datasheet
IP4338CX24/LF,135
Specifications of IP4338CX24/LF,135
Related parts for IP4338CX24/LF,135
IP4338CX24/LF,135 Summary of contents
Page 1
IP4338CX24/LF 10-channel integrated filter network with ESD input protection to IEC 61000-4-2 level 4 Rev. 02 — 20 August 2009 1. Product profile 1.1 General description The IP4338CX24/ 10-channel RC low-pass filter array which is designed to provide ...
Page 2
... NXP Semiconductors 2. Pinning information 2.1 Pinning Fig 1. 2.2 Pin description Table 1. Pin A2 and A5 A1 and A4 B2 and B5 B1 and B4 C2 and C5 C1 and C4 D2 and D5 D1 and D4 E2 and E5 E1 and E4 A3, C3, D3 Ordering information Table 2. Ordering information Type number Package ...
Page 3
... NXP Semiconductors 4. Functional diagram Fig 2. 5. Limiting values Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol ESD tot T stg T reflow(peak) T amb [1] Device is qualified with 1000 pulses contact discharges each, according to the IEC61000-4-2 model and far exceeds the specified level contact discharge). ...
Page 4
... NXP Semiconductors 6. Characteristics Table unless otherwise specified. amb Symbol Parameter R s(ch [1] Guaranteed by design. Table unless otherwise specified. amb Symbol Parameter il ct IP4338CX24LF_2 Product data sheet 10-channel integrated filter network with ESD input protection Channel characteristics Conditions channel series resistance (DC) ...
Page 5
... NXP Semiconductors 7. Application information 7.1 Insertion loss The insertion loss measurement configuration of a typical 50 system for evaluation of the IP4338CX24/LF is shown example, the insertion loss of channels between pins A2 and A5, A1 and A4, C1 and C4, E2 and E5, E1 and E4 at frequencies GHz is displayed in The insertion loss is measured with a test PCB utilizing laser drilled micro-via holes that connect the PCB ground plane to the IP4338CX24/LF ground pins ...
Page 6
... NXP Semiconductors 7.2 Crosstalk The crosstalk measurement configuration of a typical 50 the IP4338CX24/LF is shown in The measured crosstalk within the IP4338CX24/ channel to another is shown in unused connections are terminated with 50 Fig 5. (dB) (1) Channels 2 and 6 (pins A1 and C4). (2) Channels 2 and 10 (pins A1 and E4). (3) Channels 3 and 7 (pins B2 and D5). ...
Page 7
... NXP Semiconductors 8. Package outline WLCSP24: wafer level chip-size package; 24 bumps; 1.96 x 2.01 x 0.61 mm bump A1 index area Dimensions Unit max 0.66 0.22 0.31 mm nom 0.61 0.20 0.41 0.26 min 0.56 0.18 0.21 Outline version IEC IP4338CX24/LF Fig 7. Package outline IP4338CX24/LF (WLCSP24) IP4338CX24LF_2 Product data sheet 10-channel integrated fi ...
Page 8
... NXP Semiconductors 9. Soldering of WLCSP packages 9.1 Introduction to soldering WLCSP packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface mount refl ...
Page 9
... NXP Semiconductors Fig 8. For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description” . 9.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • The size of the solder land on the substrate • ...
Page 10
... NXP Semiconductors Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. Removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon. The surface of the substrate should be carefully cleaned and all solder and fl ...
Page 11
... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
Page 12
... NXP Semiconductors 14. Contents 1 Product profi 1.1 General description 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 2.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 5 Limiting values Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Application information 7.1 Insertion loss . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 Crosstalk Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 Soldering of WLCSP packages ...