LC4128ZE-7TN100I Lattice, LC4128ZE-7TN100I Datasheet - Page 15

• Manufacturer Part Number: LC4128ZE-7TN100I
• Description: IC PLD 128MC 64I/O 7.5NS 100TQFP
• Manufacturer: Lattice
• Series: ispMACH®r

Specifications of LC4128ZE-7TN100I

• Programmable Type: CPLD
• Number Of Macrocells: 128
• Voltage - Input: 1.7 V ~ 1.9 V
• Speed: 7.5ns
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1026

Lattice Semiconductor
Some Simple Use Scenarios
The following diagrams show a few simple examples that omit optional signals for the OSCTIMER block:
A. An oscillator giving 5MHz nominal clock
B. An oscillator that can be disabled with an external signal (5MHz nominal clock)
C. An oscillator giving approximately 5 Hz nominal clock (TIMER_DIV = 2
D. An oscillator giving two output clocks: ~5MHz and ~5KHz (TIMER_DIV= 2
OSCTIMER Integration With CPLD Fabric
The OSCTIMER is integrated into the CPLD fabric using the Global Routing Pool (GRP). The macrocell (MC) feed-
back path for two macrocells is augmented with a programmable multiplexer, as shown in Figure 15. The OSC-
TIMER outputs (OSCOUT and TIMEROUT) can optionally drive the GRP lines, whereas the macrocell outputs can
drive the optional OSCTIMER inputs TIMERRES and DYNOSCDIS.
Figure 15. OSCTIMER Integration With CPLD Fabric
Table 12 shows how these two MCs are designated in each of the ispMACH4000ZE device.
(A) A simple 5MHz oscillator.
(C) A simple 5Hz oscillator.
OSCTIME R
TI ME R_DIV= N /A
OSCTIME R
TI ME R_DIV= 2
A Regular Macrocell
OSC Macrocell
TIMER Macrocell
20
OSCOUT
TIMEROUT
To GRP
To GRP
To GRP
DYNOS CD IS
1
1
0
0
1
1
0
0
TIMEROUT
OSCOUT
15
DYNOSCDIS
TIMERRES
(B) An oscillator with dynamic disable.
(D) Oscillator with two outputs (5MHz and 5KHz).
ispMACH 4000ZE Family Data Sheet
OSCTIME R
TI ME R_DIV= N /A
OSCTIME R
TI ME R_DIV= 2
20
(1,048,576))
10
(1,024))
10
Macrocell
Feedback
Signal
Macrocell 15
Feedback
Signal
Macrocell 15
Feedback
Signal
OSCOUT
OSCOUT
TIMEROUT