ML610Q422-NNNTBZ03A7 Rohm Semiconductor, ML610Q422-NNNTBZ03A7 Datasheet

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ML610Q422-NNNTBZ03A7

Manufacturer Part Number
ML610Q422-NNNTBZ03A7
Description
MCU 8BIT 32K FLASH 22CH 120-TQFP
Manufacturer
Rohm Semiconductor
Series
-r

Specifications of ML610Q422-NNNTBZ03A7

Core Processor
nX-U8/100
Core Size
8-Bit
Speed
4.2MHz
Connectivity
I²C, SSP, UART/USART
Peripherals
LCD, Melody Driver, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 2x12b, 2x24b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 70°C
Package / Case
100-TFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
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Quantity
Price
Part Number:
ML610Q422-NNNTBZ03A7
Manufacturer:
ROHM
Quantity:
1 001
Part Number:
ML610Q422-NNNTBZ03A7
Manufacturer:
Rohm Semiconductor
Quantity:
10 000
GENERAL DESCRIPTION
This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous serial port,
UART, I
successive approximation type A/D converter, and LCD driver, are incorporated around 8-bit CPU nX-U8/100.
The CPU nX-U8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by 3-stage pipe line architecture
parallel procesing. The Flash ROM that is installed as program memory achieves low-voltage low-power consumption operation
(read operation) equivalent to mask ROM and is most suitable for battery-driven applications.
The on-chip debug function that is installed enables program debugging and programming.
FEATURES
• CPU
• Internal memory
• Interrupt controller
• Time base counter
• Watchdog timer
• Timers
ML610Q421/ML610Q422
8-bit Microcontroller with a Built-in LCD driver
− 8-bit RISC CPU (CPU name: nX-U8/100)
− Instruction system: 16-bit instructions
− Instruction set:
− On-Chip debug function
− Minimum instruction execution time
− Internal 32KBbyte Flash ROM (16K×16 bits) (including unusable 1KByte TEST area)
− Internal 1KByte Data RAM (1024×8 bits), 1KByte Display Allocation RAM (1024 x 8bit)
− Internal 100Byte RAM for display
− 2 non-maskable interrupt sources (Internal source: 1, External source: 1)
− 20 maskable interrupt sources (Internal sources: 16, External sources: 4)
− Low-speed time base counter ×1 channel
− High-speed time base counter ×1 channel
− Non-maskable interrupt and reset
− Free running
− Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s)
30.5 μs (@32.768 kHz system clock)
0.24 4μs (@4.096 MHz system clock)
Frequency compensation (Compensation range: Approx. −488ppm to +488ppm. Compensation accuracy: Approx.
0.48ppm)
8 bits × 4 channels (Timer0-3: 16-bit x 2 configuration available by using Timer0-1 or Timer2-3)
Clock frequency measurement mode (in one channel of 16-bit configuration using Timer2-3)
2
C bus interface (master), melody driver, battery level detect circuit, RC oscillation type A/D converter, 12-bit
Transfer,
manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic
shift, and so on
arithmetic
operations,
comparison,
logic
operations,
multiplication/division,
Issue Date: Jul.29, 2009
FEDL610Q421-01
1/35
bit

Related parts for ML610Q422-NNNTBZ03A7

ML610Q422-NNNTBZ03A7 Summary of contents

Page 1

... ML610Q421/ML610Q422 8-bit Microcontroller with a Built-in LCD driver GENERAL DESCRIPTION This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as synchronous serial port, 2 UART bus interface (master), melody driver, battery level detect circuit, RC oscillation type A/D converter, 12-bit successive approximation type A/D converter, and LCD driver, are incorporated around 8-bit CPU nX-U8/100. ...

Page 2

... General-purpose ports − Non-maskable interrupt input port × 1 channel − Input-only port × 6 channels (including secondary functions) − Output-only port × 3 channels (including secondary functions) − Input/output port ML610Q421: 22 channels (including secondary functions) ML610Q422: 14 channels (including secondary functions) FEDL610Q421-01 ML610Q421/ML610Q422 2/35 ...

Page 3

... Dot matrix can be supported. ML610Q421: 400 dots max. (50 seg × 8 com), 1/1 to 1/8 duty ML610Q422: 800 dots max. (50 seg × 16 com) , 1/1 to 1/16 duty − 1/3 or 1/4 bias (built-in bias generation circuit) − Frame frequency selecable (approx. 64 Hz, 73 Hz, 85 Hz, and 102 Hz) − ...

Page 4

... TBC 1 INT 1 1kHzTC INT 1 Capture ×2 INT 5 INT 4 8bit Timer ×4 Display Allocation RAM 1024Byte Display RAM 100Byte Figure 1 ML610Q421 Block Diagram FEDL610Q421-01 ML610Q421/ML610Q422 Program Memory V PP (Flash) 32Kbyte SCK0* SSIO SIN0* SOUT0* RXD0* UART TXD0* SDA SCL* PWM PWM0* Melody ...

Page 5

... OKI SEMICONDUCTOR ML610Q422 Block Diagram Figure 2 show the block diagram of the ML610Q422. "*" indicates the secondary function of each port. CPU (nX-U8/100) EPSW1~3 GREG 0~15 PSW Timing ALU Controller Instruction On-Chip Decoder ICE RESET_N RESET & TEST TEST XT0 XT1 ...

Page 6

... AVSS (NC) 116 VREF 117 AIN0 118 AIN1 119 AVDD 120 120pin 1pin Note: The assignment of the pads P30 to P35 are not in order. Figure 3 ML610Q421 TQFP120 Pin Configuration FEDL610Q421-01 ML610Q421/ML610Q422 61pin 60pin SEG18 60 SEG17 59 SEG16 58 SEG15 57 SEG14 56 SEG13 55 SEG12 54 SEG11 53 ...

Page 7

... AVSS (NC) 116 VREF 117 AIN0 118 AIN1 119 AVDD 120 120pin 1pin Note: The assignment of the pads P30 to P35 are not in order. Figure 4 ML610Q422 TQFP120 Pin Configuration FEDL610Q421-01 ML610Q421/ML610Q422 61pin 60pin SEG18 60 SEG17 59 SEG16 58 SEG15 57 SEG14 56 SEG13 55 SEG12 ...

Page 8

... PAD count: Minimum PAD pitch: PAD aperture: Chip thickness: Voltage of the rear side of chip: Figure 5 ML610Q421 Chip Layout & Dimension 2.98mm 2.98 mm × 3.02 mm 116 pins 80 μm 70 μm × 70 μm 350 μm V level SS FEDL610Q421-01 ML610Q421/ML610Q422 58 SEG18 57 SEG17 56 SEG16 55 SEG15 54 SEG14 53 SEG13 52 SEG12 51 ...

Page 9

... The assignment of the pads P30 to P35 are not in order. Chip size: PAD count: Minimum PAD pitch: PAD aperture: Chip thickness: Voltage of the rear side of chip: Figure 6 ML610Q422 Chip Layout & Dimension 2.98mm 2.98 mm × 3.02 mm 116 pins 80 μm 70 μm × 70 μm 350 μm ...

Page 10

... COM6 -1384 640 97 COM7 -1384 560 98 PA0 -1384 480 99 PA1 -1384 400 100 PA2 -1384 320 FEDL610Q421-01 ML610Q421/ML610Q422 Chip Center: X=0,Y=0 PAD Pad X Y No. Name (μm) (μm) 101 PA3 -1384 240 102 PA4 -1384 160 103 PA5 -1384 80 104 ...

Page 11

... SEG5 1384 160 46 SEG6 1384 240 47 SEG7 1384 320 48 SEG8 1384 400 49 SEG9 1384 480 50 SEG10 1384 560 Table 2 ML610Q422 Pad Coordinates PAD Pad X Y No. Name (μm) (μm) 51 SEG11 1384 640 52 SEG12 1384 720 53 SEG13 1384 800 54 SEG14 1384 880 ...

Page 12

... FEDL610Q421-01 ML610Q421/ML610Q422 Tertiary function Function ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 13

... RT1 O sensor connection pin ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ FEDL610Q421-01 ML610Q421/ML610Q422 Tertiary function Function ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 14

... FEDL610Q421-01 ML610Q421/ML610Q422 Tertiary function Function ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 15

... FEDL610Q421-01 ML610Q421/ML610Q422 Tertiary function Function ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ...

Page 16

... Since these pins have secondary functions, the pins cannot be used as a port when the secondary functions are used. I/O General-purpose input/output port. PA0-PA7 These pins are for the ML610Q421, but are not provided in the ML610Q422. Description SS FEDL610Q421-01 ML610Q421/ML610Q422 Primary/ Secondary/ Logic Tertiary — Negative — — ...

Page 17

... P45 pin. Melody Melody/buzzer signal output pin. This pin is used as the secondary MD0 O function of the P22 pin. LED drive Nch open drain output pins to drive LED. LED0-2 O Description FEDL610Q421-01 ML610Q421/ML610Q422 Primary/ Secondary/ Logic Tertiary Secondary Positive Primary/Se Positive condary Secondary Positive ...

Page 18

... LCD drive signal Common output pins. COM0-7 O Common output pins. COM8-15 O These pins are for the ML610Q422, but are not provided in the ML610Q421. Segment output pin. SEG0-49 O LCD driver power supply Power supply pins for LCD bias (internally generated). Capacitors Ca, Cb, V — ...

Page 19

... Table 3 Termination of Unused Pins Recommended pin termination Open Open Open Open Open Open Open Open Open Open Open Open Open FEDL610Q421-01 ML610Q421/ML610Q422 19/35 ...

Page 20

... Ta = 25°C DDX 25° 25° 25° 25° 25° 25°C OUT I Port3– 25°C OUT1 I Port2 25°C OUT2 25°C ⎯ T STG Symbol Condition ML610Q421, ML610Q422 T OP ML610Q421P, ML610Q422P ⎯ ⎯ 1 1 1.8 to 3.6V DD ⎯ f XTL ⎯ ⎯ ⎯ f XTH ⎯ ...

Page 21

... 1.8 to 3.6V ― DD ⎯ 0.2 ⎯ 200 ⎯ ⎯ ⎯ ⎯ VIL1 VIL1 P RST RESET_N pin reset DD Power on reset FEDL610Q421-01 ML610Q421/ML610Q422 ( 0V Range Unit ° +40 2.75 to 3.6 2.5 to 2.75 V 7.7 to 8.3 80 cycles years 10 specified) (1/5) Rating Measuring Unit circuit Typ ...

Page 22

... L4 SS 1/3 bias Typ. = 3.0V, −10% 1/4 bias 1/3 bias Typ. −V ) −10% 1/4 bias L4 SS ⎯ ⎯ FEDL610Q421-01 ML610Q421/ML610Q422 specified) (2/5) Rating Measuring Unit circuit Typ. Max. 0.94 0.99 0.96 1.01 0.98 1.03 1.00 1.05 1.02 1.07 1.04 1.09 1 ...

Page 23

... Ta = -20 ⎯ to +70° -40 ⎯ to +85° ⎯ 25° -20 ⎯ to +70° -40 ⎯ to +85° ⎯ 25°C FEDL610Q421-01 ML610Q421/ML610Q422 specified) (3/5) Rating Measuring Unit circuit Typ. Max. 1.35 1 1.4 1.45 1.5 1.6 1.7 1.8 1.9 Typ. V +2% 2.0 2.1 2.2 2 ...

Page 24

... C mode is selected −0.2 ⎯ −0.2 ⎯ −0.2 ⎯ −0.2 ⎯ ⎯ (in high-impedance state) DD −1 (in high-impedance state) SS FEDL610Q421-01 ML610Q421/ML610Q422 ⎯ 2.5 ⎯ 2.5 /C =0pF specified) (4/5) Rating Measuring Unit circuit Typ. Max. ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 0.5 ⎯ ...

Page 25

... DD 0 1.1 to 3.6V DD × 1 1 0.7 ⎯ ×V DD ⎯ 10kHz ⎯ 50mV rms Ta = 25°C FEDL610Q421-01 ML610Q421/ML610Q422 ⎯ 1 −300 −20 −300 -10 −300 -2 300 600 300 600 300 600 ⎯ ⎯ μ 200 30 200 30 200 −30 −2 −30 -0.2 − ...

Page 26

... VIL V DD (*1) Input logic circuit to determine the specified measuring conditions. (*2) Measured at the specified output pins REF DDL DDX DDL DDX REF FEDL610Q421-01 ML610Q421/ML610Q422 1μ 1μ 0.1μ 0.1μ 1μ 1μ 24pF 24pF DH 32.768kHz crystal: C-001R (Epson Toyocom) 4.096MHz crystal: HC49SFWB (Kyocera) ...

Page 27

... Input logic circuit to determine the specified measuring conditions. *2: Measured at the specified output pins. MEASURING CIRCUIT 4 (* *3: Measured at the specified output pins. MEASURING CIRCUIT 5 VIH (*1) VIL *1: Input logic circuit to determine the specified measuring conditions DDL DDX REF DDL DDX REF DDL DDX REF L3 FEDL610Q421-01 ML610Q421/ML610Q422 (* 27/35 ...

Page 28

... NUL t NUL = 0V −20 to +70° −40 to +85°C for P version, unless otherwise = Symbol Condition ⎯ t TBRT ⎯ t RBRT t TBRT t RBRT FEDL610Q421-01 ML610Q421/ML610Q422 specified) Rating Unit Min. Typ. Max. ⎯ μs 76.8 106.8 specified) Rating Unit Min. Typ. Max. 1 ⎯ ⎯ BRT* ...

Page 29

... When high-speed oscillation is 3 active 1.8 to 3.6V) DD When RC oscillation is active 1.3 to 3.6V When high-speed oscillation is 3 active 1.8 to 3.6V SCYC FEDL610Q421-01 ML610Q421/ML610Q422 specified) Rating Min. Typ. Max. 2 ⎯ ⎯ 10 ⎯ ⎯ ⎯ ⎯ SCLK* 2 ⎯ ⎯ 4 ⎯ ⎯ 0 SCLK* SCLK* SCLK* ×0.4 ×0.5 × ...

Page 30

... HD:DAT ⎯ t SU:DAT ⎯ t SU:STO ⎯ t BUF Restart condition LOW HIGH SU:STA HD:STA SU:DAT FEDL610Q421-01 ML610Q421/ML610Q422 otherwise specified) Rating Unit Min. Typ. Max. ⎯ 0 100 kHz ⎯ ⎯ μs 4.0 ⎯ ⎯ μs 4.7 ⎯ ⎯ μs 4.0 ⎯ ⎯ ...

Page 31

... OSCX CVR0 CVR1 RCT0 RS0 RT0 IN1 CS1 RS1 RT1 DDL DDX DD REF FEDL610Q421-01 ML610Q421/ML610Q422 otherwise specified) Rating Min. Typ. Max. ⎯ ⎯ 1 209.4 330.6 435.1 41.29 55.27 64.16 4.71 5.97 7.06 5.567 5.982 6.225 0.99 1 1.01 0.104 0.108 ...

Page 32

... FSE ⎯ V REF SACK = 0 (HSCLK = 375kHz to 625kHz) t CONV SACK = 1 (HSCLK = 1.5MHz to 4.2MHz) V REF 10μF RI≤5kΩ − AIN0, AIN1 + 0.1μF FEDL610Q421-01 ML610Q421/ML610Q422 specified) Rating Unit Min. Typ. Max. ⎯ ⎯ 12 bit −4 ⎯ +4 −6 ⎯ +6 −3 ⎯ +3 LSB −5 ⎯ ...

Page 33

... The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact our responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). FEDL610Q421-01 ML610Q421/ML610Q422 (Unit: mm) Package material Epoxy resin ...

Page 34

... OKI SEMICONDUCTOR REVISION HISTORY Document No. Date FEDL610Q421-01 Jul. 29, 2009 Page Previous Current Edition Edition – – Formally edition 1 FEDL610Q421-01 ML610Q421/ML610Q422 Description 34/35 ...

Page 35

... No part of the contents contained herein may be reprinted or reproduced without our prior permission. ML610Q421/ML610Q422 Copyright 2008 OKI SEMICONDUCTOR CO., LTD. FEDL610Q421-01 ...

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