CY2318ANZPVC-11 Cypress Semiconductor Corp, CY2318ANZPVC-11 Datasheet

IC CLK BUFF 18OUT SDRAM 48-SSOP

CY2318ANZPVC-11

Manufacturer Part Number
CY2318ANZPVC-11
Description
IC CLK BUFF 18OUT SDRAM 48-SSOP
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Bufferr
Datasheet

Specifications of CY2318ANZPVC-11

Package / Case
48-SSOP
Input
Clock
Output
Clock
Frequency - Max
100MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
100MHz
Number Of Outputs
18
Propagation Delay (max)
5 ns
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2318ANZPVC-11
Manufacturer:
CY
Quantity:
16
Part Number:
CY2318ANZPVC-11
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Part Number:
CY2318ANZPVC-11
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY2318ANZPVC-11A
Manufacturer:
NEC
Quantity:
6 223
Part Number:
CY2318ANZPVC-11T
Manufacturer:
DALLAS
Quantity:
435
Part Number:
CY2318ANZPVC-11T
Manufacturer:
CY
Quantity:
1 848
Part Number:
CY2318ANZPVC-11T
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-07181 Rev. *C
Features
• One input to 18 output buffer/driver
• Supports up to four SDRAM DIMMs
• Two additional outputs for feedback
• Serial interface for individual output control
• 150ps typical output-output skew
• Up to 100 MHz operation
• Dedicated OE pin for testing
• Space-saving 48-pin SSOP package
• 3.3V operation
Block Diagram
SCLOCK
BUF_IN
SDATA
OE
Serial Interface
Decoding
3901 North First Street
18 Output, 3.3V SDRAM Buffer for
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM10
SDRAM11
SDRAM12
SDRAM13
SDRAM14
SDRAM15
SDRAM16
SDRAM17
Functional Description
The CY2318ANZ is a 3.3V buffer designed to distribute
high-speed clocks in PC applications. The part has 18 outputs,
16 of which can be used to drive up to four SDRAM DIMMs,
and the remaining can be used for external feedback to a PLL.
The device operates at 3.3V and outputs can run up to 100
MHz, thus making it compatible with Pentium II
The CY2318ANZ can be used in conjunction with the CY2280,
CY2281, CY2282 or similar clock synthesizer for a complete
Pentium II motherboard solution.
The CY2318ANZ also includes a serial interface which can
enable or disable each output clock. On power-up, all output
clocks are enabled (internal pull up). A separate Output
Enable pin facilitates testing on ATE.
Desktop PCs with 4 DIMMs
San Jose
SDRAM16
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
BUF_IN
SDATA
V
DDIIC
,
Pin Configuration
V
V
V
V
V
V
V
V
V
V
NC
NC
DD
DD
DD
DD
DD
CA 95134
SS
SS
SS
SS
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Top View
Revised Oct. 03, 2005
SSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CY2318ANZ
408-943-2600
SDRAM9
SDRAM8
V
V
SDRAM17
V
V
SCLOCK
NC
NC
V
SDRAM15
SDRAM14
V
V
SDRAM13
SDRAM12
V
OE
V
SDRAM11
SDRAM10
V
V
SS
DD
SS
SSIIC
®
DD
SS
DD
SS
DD
SS
DD
processors.
[+] Feedback

Related parts for CY2318ANZPVC-11

CY2318ANZPVC-11 Summary of contents

Page 1

... Block Diagram BUF_IN SDATA Serial Interface Decoding SCLOCK OE Cypress Semiconductor Corporation Document #: 38-07181 Rev Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Functional Description The CY2318ANZ is a 3.3V buffer designed to distribute high-speed clocks in PC applications. The part has 18 outputs which can be used to drive up to four SDRAM DIMMs, and the remaining can be used for external feedback to a PLL ...

Page 2

Pin Summary Name Pins 12, 16, 20, 29, 33, 37, 42 10, 15, 19, 22, 27, 30, 34, 39, 43 Ground DDIIC V 26 SSIIC BUF_IN SDATA ...

Page 3

Serial Configuration Map • The Serial bits will be read by the clock driver in the following order: Byte 0 - Bits Byte 1 - Bits ...

Page 4

Maximum Ratings Supply Voltage to Ground Potential ..................–0.5 to +7.0V DC Input Voltage (except BUF_IN) .......... –0. Input Voltage (BUF_IN).............................. –0.5V to 7.0V Operating Conditions Parameter Supply Voltage DD DDIIC T Operating Temperature (Ambient ...

Page 5

Switching Characteristics Parameter Name Maximum Operating Frequency [3, 5] ÷ t Duty Cycle = [3] t Rising Edge Rate 3 [3] t Falling Edge Rate 4 [3] t Output to Output Skew 5 t SDRAM Buffer ...

Page 6

Switching Waveforms (continued) SDRAM Buffer LH and HL Propagation Delay INPUT OUTPUT t 6 SDRAM Buffer Enable and Disable Times OE Three-State Active OUTPUTS t 8 Test Circuit 0.1 µF Document #: 38-07181 Rev ...

Page 7

... Application Circuit Rs CPUCLK CY2280: 48-pin SSOP Ordering Information Ordering Code CY2318ANZPVC–11 CY2318ANZPVC–11T Lead-free CY2318ANZPVXC–11 CY2318ANZPVXC–11T Document #: 38-07181 Rev. *C +3.3V VDD 0.1 µF BUF_IN VDDIIC 0.1 µF Rs SDRAM[0:17] VssIIC SDATA SCLK Vss CY2318ANZ: 48-pin SSOP Package Type 48-pin SSOP ...

Page 8

... Document #: 38-07181 Rev. *C © Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 9

Document History Page Document Title: CY2318ANZ 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs Document Number: 38-07181 Issue Orig. of REV. ECN NO. Date Change ** 111857 12/09/01 *A 121833 12/14/02 *B 310577 See ECN *C 399949 ...

Related keywords