AD9548BCPZ Analog Devices Inc, AD9548BCPZ Datasheet - Page 51

• Manufacturer Part Number: AD9548BCPZ
• Description: IC CLOCK GEN/SYNCHRONIZR 88LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9548BCPZ

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 88-LFCSP
• Frequency-max: *
• Clock Ic Type: Clock Synthesizer
• Ic Interface Type: Serial
• Frequency: 1GHz
• No. Of Outputs: 4
• No. Of Multipliers / Dividers: 4
• Supply Current: 190mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SERIAL CONTROL PORT
The AD9548 serial control port is a flexible, synchronous serial
communications port that provides a convenient interface to
many industry-standard microcontrollers and microprocessors.
The AD9548 serial control port is compatible with most
synchronous transfer formats, including Philips I2C, Motorola
SPI, and Intel SSR protocols. The serial control port allows
read/write access to the AD9548 register map.
In SPI mode, single or multiple byte transfers are supported.
The SPI port configuration is programmable via Register 0000.
This register is integrated into the SPI control logic rather than
in the register map and is distinct from the I
is also inaccessible to the EEPROM controller.
A functional diagram of the serial control port, including its
relationship to the EEPROM, appears in Figure 51.
Although the AD9548 supports both the SPI and I
protocols, only one is active following power-up (as determined
by the multifunction pins, M0 to M2, during the startup
sequence). That is, the only way to change the serial port
protocol is to reset the device (or cycle the device power
supply). Both protocols use a common set of control pins as
shown in Figure 52.
SPI/I²C PORT SELECTION
Because the AD9548 supports both SPI and I2C protocols, the
active serial port protocol depends on the logic state of the three
multifunction pins, M0 to M2, at startup. If all three pins are set
to Logic 0 at startup, then the SPI protocol is active. Otherwise,
the I2C protocol is active with seven different I2C slave address
settings based on the startup logic pattern on the M0 to M2 pins
SCLK/SCL
CSB/SDA
Figure 52. Serial Control Port
SDIO
SDO
SCLK/SCL
2
3
4
5
CS/SDA
SDIO
SDO
AD9548
CONTROL
SERIAL
PORT
EEPROM
2
C Register 0000. It
SERIAL CONTROL ARBITER
2
C serial port
Figure 51. Serial Port Functional Diagram
CONTROLLER
SPI
I
2
EEPROM
C
400kHz
Rev. A | Page 51 of 112
13-BIT ADDRESS
(see Table 28). Note that the four MSBs of the slave address are
hardware coded as 1011.
Table 28. Serial Port Mode Selection
M2
0
0
0
0
1
1
1
1
SPI SERIAL PORT OPERATION
Pin Descriptions
The SCLK (serial clock) pin serves as the serial shift clock. This
pin is an input. SCLK synchronizes serial control port read and
write operations. The rising edge SCLK registers write data bits,
and the falling edge registers read data bits. The SCLK pin
supports a maximum clock rate of 40 MHz.
The SDIO (serial data input/output) pin is a dual-purpose pin
and acts as either an input only (unidirectional mode) or as
both an input and an output (bidirectional mode). The AD9548
default SPI mode is bidirectional.
The SDO (serial data output) pin is useful only in
unidirectional I/O mode. It serves as the data output pin for
read operations.
The CS (chip select) pin is an active low control that gates read
and write operations. This pin is internally connected to a 30 kΩ
pull-up resistor. When CS is high, the SDO and SDIO pins go
into a high impedance state.
READ/WRITE
READ ONLY
REGION
REGION
SPACE
ANALOG BLOCKS AND
POWER-ON RESET
DIGITAL CORE
M1
0
0
1
1
0
0
1
1
PIN CONTROL
FUNCTION
M0
0
1
0
1
0
1
0
1
MULTI-
LOGIC
Serial Port Mode
SPI
I²C (address = 1001001)
I²C (address = 1001010)
I²C (address = 1001011)
I²C (address = 1001100)
I²C (address = 1001101)
I²C (address = 1001110)
I²C (address = 1001111)
M7
M6
M5
M4
M3
M2
M1
M0
AD9548