SI5319B-C-GM Silicon Laboratories Inc, SI5319B-C-GM Datasheet - Page 37
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SI5319B-C-GM
Manufacturer Part Number
SI5319B-C-GM
Description
IC CLOCK MULT/ATTENUATOR 36QFN
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI5319C-C-GMR.pdf
(50 pages)
Specifications of SI5319B-C-GM
Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
36-VQFN
Frequency-max
*
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
QFN EP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Reset value = 0000 0000
Register 136.
Name
Type
5:2
1:0
Bit
Bit
7
6
RST_REG
GRADE_RO
RST_REG
Reserved
R/W
Name
D7
ICAL
[1:0]
Internal Reset (Same as Pin Reset).
Note: The I2C (or SPI) port may not be accessed until 10 ms after RST_REG is asserted.
0: Normal operation.
1: Reset of all internal logic. Outputs disabled or tristated during reset.
Start an Internal Calibration Sequence.
For proper operation, the device must go through an internal calibration sequence. ICAL
is a self-clearing bit. Writing a one to this location initiates an ICAL. The calibration is
complete once the LOL alarm goes low. A valid stable clock (within 100 ppm) must be
present to begin ICAL.
Note: Any divider, CLKINn_RATE or BWSEL_REG changes require an ICAL to take
effect.
0: Normal operation.
1: Writing a "1" initiates internal self-calibration. Upon completion of internal self-calibra-
tion, LOL will go low.
Reserved.
Indicates Maximum Clock Output Frequency of this Device.
Limits the range of the N1_HS divider.
00: N1_HS x NC1_LS > 4. Maximum clock output frequency = 1.4175 GHz.
01: N1_HS x NC1_LS > 6. Maximum clock output frequency = 808 MHz.
10: N1_HS x NC1_LS > 14. Maximum clock output frequency = 346 MHz.
11: N1_HS x NC1_LS > 20. Maximum clock output frequency = 243 MHz.
ICAL
R/W
D6
D5
Rev. 1.0
D4
Reserved
R
Function
D3
D2
GRADE_RO [1:0]
D1
Si5319
R
D0
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