SI5319B-C-GM Silicon Laboratories Inc, SI5319B-C-GM Datasheet - Page 42
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SI5319B-C-GM
Manufacturer Part Number
SI5319B-C-GM
Description
IC CLOCK MULT/ATTENUATOR 36QFN
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI5319C-C-GMR.pdf
(50 pages)
Specifications of SI5319B-C-GM
Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
36-VQFN
Frequency-max
*
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
QFN EP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Si5319
42
Note: Internal register names are indicated by underlined italics (e.g., INT_PIN. See Si5319 Register Map).
Pin #
GND
PAD
25
24
26
27
29
28
36
Pin Name
CKOUT–
CKOUT+
CMODE
A2_SS
GND
SDI
A1
A0
GND
I/O
O
I
I
I
I
Signal Level
LVCMOS
LVCMOS
LVCMOS
LVCMOS
Supply
Multi
Serial Port Address.
In I
controlled address bits. The I
In SPI control mode (CMODE = 1), these pins are ignored.
These pins have a weak pull-down.
Serial Port Address/Slave Select.
In I
controlled address bit [A2].
In SPI control mode (CMODE = 1), this pin functions as the slave
select input.
This pin has a weak pull-down.
Serial Data In.
In I
In SPI control mode (CMODE = 1), this pin functions as the serial data
input.
This pin has a weak pull-down.
Output Clock.
Differential output clock with a frequency range of 10 MHz to
1.4175 GHz. Output signal format is selected by SFOUT1_REG regis-
ter bits. Output is differential for LVPECL, LVDS, and CML compatible
modes. For CMOS format, both output pins drive identical single-
ended clock outputs.
Control Mode.
Selects I
0 = I
1 = SPI Control Mode
Ground Pad.
The ground pad must provide a low thermal and electrical impedance
to a ground plane.
2
2
2
C control mode (CMODE = 0), these pins function as hardware
C control mode (CMODE = 0), this pin functions as a hardware
C control mode (CMODE = 0), this pin is ignored.
2
C Control Mode
2
C or SPI control mode for the Si5319.
Rev. 1.0
Description
2
C address is 1101 [A2] [A1] [A0].