CY29948AI Cypress Semiconductor Corp, CY29948AI Datasheet - Page 2

• Manufacturer Part Number: CY29948AI
• Description: IC CLK BUFF 1:12 200MHZ 32TQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of CY29948AI

• Number Of Circuits: 1
• Ratio - Input:output: 1:12
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 200MHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Document #: 38-07288 Rev. *C
Pin Description
Output Enable/Disable
The CY29948 features a control input to enable or disable the
outputs. This data is latched on the falling edge of the input
clock. When SYNC_OE is asserted LOW, the outputs are
disabled in a LOW state. When SYNC_OE is set HIGH, the
outputs are enabled as shown in Figure 1.
Note:
1. PD = Internal pull-down, PU = Internal pull-up.
17, 19, 21, 23,
25, 27, 29, 31
10, 14, 18, 22,
8, 12, 16, 20,
9, 11, 13, 15,
24, 28, 32
26, 30
Pin
3
4
2
1
5
6
7
SYNC_OE
TCLK
PECL_CLK#
Q
PECL_CLK
TCLK_SEL
SYNC_OE
[1]
Q(11:0)
VDDC
Name
TCLK
VDD
VSS
TS#
VDDC
PWR
Figure 1. SYNC_OE Timing Diagram
I, PU
I, PD
I, PU
I, PU
I, PU
I, PU
I/O
O
PECL Input Clock
PECL Input Clock
External Reference/Test Clock Input
Clock Outputs
Clock Select Input. When LOW, PECL clock is selected. When HIGH
TCLK is selected.
Output Enable Input. When asserted HIGH, the outputs are enabled.
When set LOW the outputs are disabled in a LOW state.
Three-state Control Input. When asserted LOW, the output buffers
are three-stated. When set HIGH, the output buffers are enabled.
2.5V or 3.3V Power Supply for Output Clock Buffers
2.5V or 3.3V Power Supply
Common Ground
Description
CY29948
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