CY29948AI Cypress Semiconductor Corp, CY29948AI Datasheet - Page 3

• Manufacturer Part Number: CY29948AI
• Description: IC CLK BUFF 1:12 200MHZ 32TQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of CY29948AI

• Number Of Circuits: 1
• Ratio - Input:output: 1:12
• Differential - Input:output: Yes/No
• Input: LVCMOS, LVPECL, LVTTL
• Output: LVCMOS, LVTTL
• Frequency - Max: 200MHz
• Voltage - Supply: 2.375 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Document #: 38-07288 Rev. *C
Maximum Ratings
Maximum Input Voltage Relative to V
Maximum Input Voltage Relative to V
Storage Temperature: ................................ –65°C to + 150°C
Operating Temperature: ................................ –40°C to +85°C
Maximum ESD protection: .............................................. 2 kV
Maximum Power Supply: ................................................5.5V
Maximum Input Current: ............................................±20 mA
DC Parameters
Notes:
V
V
I
I
V
V
V
V
I
I
Zout
C
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. Inputs have pull-up/pull-down resistors that effect input current.
4. The V
5. Driving series or parallel terminated 50Ω (or 50Ω to V
IL
IH
DDQ
DD
Parameter
IL
IH
PP
CMR
OL
OH
in
and the input lies within the V
CMR
is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “High” input is within the V
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Peak-to-Peak Input Voltage
PECL_CLK
Common Mode Range
PECL_CLK
Output Low Voltage
Output High Voltage
Quiescent Supply
Current
Dynamic Supply
Current
Output Impedance
Input Capacitance
V
DD
Description
[2]
= V
PP
specification.
DDC
[3]
[3]
= 3.3V ±10% or 2.5V ±5%, over the specified temperature range.
[5]
[5]
SS
DD
[4]
: ............ V
: ............. V
V
V
All other inputs
V
V
All other inputs
V
V
I
I
I
V
CL = 30 pF
V
CL = 30 pF
V
CL = 30 pF
V
CL = 30 pF
V
V
DD
OL
OH
OH
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
/2) transmission lines.
= 20 mA
= –20 mA, V
= –20 mA, V
= 3.3V, PECL_CLK single ended
= 2.5V, PECL_CLK single ended
= 3.3V, PECL_CLK single ended
= 2.5V, PECL_CLK single ended
= 3.3V
= 2.5V
= 3.3V, Outputs @ 100 MHz,
= 3.3V, Outputs @ 160 MHz,
= 2.5V, Outputs @ 100 MHz,
= 2.5V, Outputs @ 160 MHz,
= 3.3V
= 2.5V
DD
SS
– 0.3V
+ 0.3V
Conditions
DD
DD
= 3.3V
= 2.5V
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any
voltage higher than the maximum rated voltages to this circuit.
For proper operation, V
range:
V
Unused inputs must always be tied to an appropriate logic
voltage level (either V
SS
< (V
in
or V
out
) < V
V
V
SS
DD
DD
DD
2.135
in
Min.
1.49
1.10
1.75
V
300
2.0
2.5
1.8
12
14
–
–
–
–
–
–
–
–
and V
or V
SS
– 2.0
– 1.2
DD
out
).
should be constrained to the
Typ.
180
270
125
190
15
18
–
–
–
–
–
–
–
–
–
–
–
–
–
–
5
4
V
V
DD
DD
1.825
Max.
–100
1000
1.45
2.42
V
100
0.8
0.4
2.0
CY29948
18
22
–
–
7
–
–
–
–
–
DD
– 0.6
– 0.6
Page 3 of 8
CMR
Unit
mV
mA
mA
µA
pF
V
V
V
V
V
Ω
range
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