AD9512BCPZ Analog Devices Inc, AD9512BCPZ Datasheet - Page 34

• Manufacturer Part Number: AD9512BCPZ
• Description: IC CLOCK DIST 5OUT PLL 48LFCSP
• Manufacturer: Analog Devices Inc
• Type: Fanout Buffer (Distribution), Dividerr

Specifications of AD9512BCPZ

• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Frequency - Max: 1.2GHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Frequency-max: 1.2GHz
• Clock Ic Type: Clock Distribution
• Ic Interface Type: Serial
• Frequency: 1.2GHz
• No. Of Outputs: 5
• No. Of Multipliers / Dividers: 5
• Supply Voltage Range: 3.135V To 3.465V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9512/PCB - BOARD EVAL CLOCK 5CHAN 48LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD9512
writing to Register 5Ah<0> = 1b. This update bit is self-clearing
(it is not required to write 0 to it to clear it). Since any number
of bytes of data can be changed before issuing an update
command, the update simultaneously enables all register
changes since any previous update.
Phase offsets or divider synchronization will not become
effective until a SYNC is issued (see the Single-Chip
Synchronization section).
Read
If the instruction word is for a read operation (I15 = 1b), the
next N × 8 SCLK cycles clock out the data from the address
specified in the instruction word, where N is 1 to 4 as
determined by W1:W0. The readback data is valid on the falling
edge of SCLK.
The default mode of the AD9512 serial control port is
unidirectional mode; therefore, the requested data appears on
the SDO pin. It is possible to set the AD9512 to bidirectional
mode by writing the SDO enable register at 00h<7> = 1b. In
bidirectional mode, the readback data appears on the SDIO pin.
A readback request reads the data that is in the serial control
port buffer area, not the active data in the AD9512’s actual
control registers.
The AD9512 uses Address 00h to Address 5Ah. Although the
AD9512 serial control port allows both 8-bit and 16-bit
instructions, the 8-bit instruction mode provides access to five
address bits (A4 to A0) only, which restricts its use to the
address space 00h to 01F. The AD9512 defaults to 16-bit
instruction mode on power-up. The 8-bit instruction mode
(although defined for this serial control port) is not useful for
the AD9512; therefore, it is not discussed further in this data
sheet.
THE INSTRUCTION WORD (16 BITS)
The MSB of the instruction word is R/
whether the instruction is a read or a write. The next two bits,
W1:W0, indicate the length of the transfer in bytes. The final 13
bits are the addresses (A12:A0) at which to begin the read or
write operation.
Figure 31. Relationship Between Serial Control Port Register Buffers and
SCLK
SDIO
SDO
CSB
SERIAL
CONTROL
PORT
Control Registers of the AD9512
REGISTERS
UPDATE
5Ah <0>
W
, which indicates
AD9512
CORE
Rev. A | Page 34 of 48
For a write, the instruction word is followed by the number of
bytes of data indicated by Bits W1:W0, which is interpreted
according to Table 14.
Table 14. Byte Transfer Count
W1
0
0
1
1
A12:A0: These 13 bits select the address within the register map
that is written to or read from during the data transfer portion
of the communications cycle. The AD9512 does not use all of
the 13-bit address space. Only Bits A6:A0 are needed to cover
the range of the 5Ah registers used by the AD9512. Bits A12:A7
must always be 0b. For multibyte transfers, this address is the
starting byte address. In MSB first mode, subsequent bytes
increment the address.
MSB/LSB FIRST TRANSFERS
The AD9512 instruction word and byte data may be MSB first
or LSB first. The default for the AD9512 is MSB first. The LSB
first mode may be set by writing 1b to Register 00h<6>. This
takes effect immediately (because it only affects the operation of
the serial control port) and does not require that an update be
executed. Immediately after the LSB first bit is set, all serial
control port operations are changed to LSB first order.
When MSB first mode is active, the instruction and data bytes
must be written from MSB to LSB. Multibyte data transfers in
MSB first format start with an instruction byte that includes the
register address of the most significant data byte. Subsequent
data bytes must follow in order from high address to low
address. In MSB first mode, the serial control port internal
address generator decrements for each data byte of the
multibyte transfer cycle.
When LSB_First = 1b (LSB first), the instruction and data bytes
must be written from LSB to MSB. Multibyte data transfers in
LSB first format start with an instruction byte that includes the
register address of the least significant data byte followed by
multiple data bytes. The serial control port internal byte address
generator increments for each byte of the multibyte transfer
cycle.
The AD9512 serial control port register address decrements
from the register address just written toward 0000h for
multibyte I/O operations if the MSB first mode is active
(default). If the LSB first mode is active, the serial control port
register address increments from the address just written
toward 1FFFh for multibyte I/O operations.
Unused addresses are not skipped during multibyte I/O
operations; therefore, it is important to avoid multibyte I/O
operations that would include these addresses.
W0
0
1
0
1
Bytes to Transfer
1
2
3
4