CY2213ZXC-2T Cypress Semiconductor Corp, CY2213ZXC-2T Datasheet
CY2213ZXC-2T
Specifications of CY2213ZXC-2T
Related parts for CY2213ZXC-2T
CY2213ZXC-2T Summary of contents
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... VSS 10 VDD 7 SER DATA SER CLK 9 8 Cypress Semiconductor Corporation Document #: 38-07263 Rev. *E High-Frequency Programmable PECL Benefits High-accuracy clock generation One pair of differential output drivers Phase-locked loop (PLL) multiplier select Eight-bit feedback counter and six-bit reference counter for high accuracy Minimize electromagnetic interference (EMI) ...
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Pin Description Pin Name Pin Number VDDX 1 3.3V Power Supply for Crystal Driver VSSX 2 Ground for Crystal Driver XOUT 3 Reference Crystal Feedback XIN 4 Reference Crystal Input VDD 5 3.3 V Power Supply (all ...
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clk clk clk vic e S clk S data Start (S) 1 bit 7 bits 1 bit Slave Address R/W S Data ...
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PLL Frequency = Reference x P/Q = Output Reference Absolute Maximum Conditions The following table reflects stress ratings only, and functional operation at the maximums are not guaranteed. Parameter V Max. voltage on V DD,ABS DD V Max. voltage on ...
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State Transition Characteristics Specifies the maximum settling time of the CLK and CLKB outputs from device power-up. For V sequences are allowed to power-up and power-down the CY2213. From To Transition Latency CLK/CLKB Normal DD DDX AC ...
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Functional Specifications Crystal Input The CY2213 receives its reference from an external crystal. Pin XIN is the reference crystal input, and pin XOUT is the reference crystal feedback. The parameters for the crystal are given on page 5 of this ...
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The PECL differential driver is designed for low-voltage, high-frequency operation. It significantly reduces the transient switching noise and power dissipation when compared to conventional CMOS drivers. The nominal value of the channel impedance The pull-up and pull-down ...
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Figure 12 shows the definition of cycle-to-cycle duty cycle error. Cycle-to-cycle duty cycle error is defined as the difference between high-times of adjacent cycles over many cycles (typically 12800 cycles at 400 MHz). Equal require- ments apply to the low-times. ...
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... Document #: 38-07263 Rev. *E © Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document History Page Document Title: CY2213 High-Frequency Programmable PECL Clock Generator Document Number: 38-07263 Orig. of REV. ECN NO. Issue Date Change ** 113090 02/06/02 DSG *A 113512 05/24/02 CKN *B 121882 12/14/02 RBI *C 123215 12/19/02 LJN *D 124012 ...