M48T512Y-70PM1 STMicroelectronics, M48T512Y-70PM1 Datasheet - Page 11

• Manufacturer Part Number: M48T512Y-70PM1
• Description: IC TIMEKPR NVRAM 4MBIT 5V 32-DIP
• Manufacturer: STMicroelectronics
• Series: Timekeeper®r
• Type: Clock/Calendar/NVSRAMr

Specifications of M48T512Y-70PM1

• Memory Size: 4M (512K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 32-DIP (600 mil) Module
• Clock Format: BCD
• Clock Ic Type: Timekeeper
• Memory Configuration: 512K X 8
• Supply Voltage Range: 4.5V To 5.5V
• Digital Ic Case Style: DIP
• No. Of Pins: 32
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Nvram Features: RTC, Internal Battery, XTAL
• Access Time: 70ns
• Memory Case Style: DIP
• Bus Type: Parallel
• User Ram: 512KB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 32
• Mounting: Through Hole
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2856-5

M48T512Y, M48T512V
3
3.1
3.2
Note:
3.3
Note:
Clock operations
Reading the clock
Updates to the TIMEKEEPER
prevent reading data in transition (see
cells in the RAM array are only data registers and not the actual clock counters, so updating
the registers can be halted without disturbing the clock itself.
Updating is halted when a '1' is written to the READ bit, D6 in the control register (7FFF8h).
As long as a '1' remains in that position, updating is halted. After a halt is issued, the
registers reflect the count; that is, the day, date, and time that were current at the moment
the halt command was issued. All of the TIMEKEEPER registers are updated
simultaneously. A halt will not interrupt an update in progress. The next update occurs 1
second after the READ bit is reset to a '0.'
Setting the clock
Bit D7 of the control register (7FFF8h) is the WRITE bit. Setting the WRITE bit to a '1,' like
the READ bit, halts updates to the TIMEKEEPER registers. The user can then load them
with the correct day, date, and time data in 24 hour BCD format (see
Resetting the WRITE bit to a '0' then transfers the values of all time registers 7FFFFh-
7FFF9h to the actual TIMEKEEPER counters and allows normal operation to resume. After
the WRITE bit is reset, the next clock update will occur approximately one second later.
Upon power-up, both the WRITE bit and the READ bit will be reset to '0.'
Stopping and starting the oscillator.
The oscillator may be stopped at any time. If the device is going to spend a significant
amount of time on the shelf, the oscillator can be turned off to minimize current drain on the
battery. The STOP bit is located at bit D7 within 7FFF9h. Setting it to a '1' stops the
oscillator. The M48T512Y/V is shipped from STMicroelectronics with the STOP bit set to a
'1.' When reset to a '0,' the M48T512Y/V oscillator starts after approximately one second.
It is not necessary to set the WRITE bit when setting or resetting the FREQUENCY TEST
bit (FT) or the STOP bit (ST).
®
Doc ID 5747 Rev 6
registers should be halted before clock data is read to
Table 5 on page
12). The BiPORT™ TIMEKEEPER
Table 5 on page
Clock operations
12).
11/23