AD9446BSVZ-100 Analog Devices Inc, AD9446BSVZ-100 Datasheet - Page 3

• Manufacturer Part Number: AD9446BSVZ-100
• Description: IC ADC 16BIT 100MSPS 100-TQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9446BSVZ-100

• Data Interface: Parallel
• Number Of Bits: 16
• Sampling Rate (per Second): 100M
• Number Of Converters: 1
• Power Dissipation (max): 2.8W
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad
• Resolution (bits): 16bit
• Sampling Rate: 100MSPS
• Input Channel Type: Differential, Single Ended
• Supply Voltage Range - Digital: 3V To 3.6V
• Supply Current: 368mA
• Number Of Elements: 1
• Resolution: 16Bit
• Architecture: Pipelined
• Sample Rate: 100MSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±1/±1.6V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.14/4.75V
• Single Supply Voltage (max): 3.46/5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 2.8W
• Differential Linearity Error: ±0.85LSB
• Integral Nonlinearity Error: ±6LSB
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: TQFP EP
• Input Signal Type: Differential
• Package: 100TQFP EP
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel
• Signal To Noise Ratio: 79.7(Typ) dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9446-80LVDS/PCBZ - BOARD EVALUATION AD9446-80
• Lead Free Status / Rohs Status: Compliant

SPECIFICATIONS
DC SPECIFICATIONS
AVDD1 = 3.3 V, AVDD2 = 5.0 V, DRVDD = 3.3 V, LVDS mode, specified minimum sampling rate, 3.2 V p-p differential input, internal
trimmed reference (1.6 V mode), A
Table 1.
Parameter
RESOLUTION
ACCURACY
VOLTAGE REFERENCE
INPUT REFERRED NOISE
ANALOG INPUT
POWER SUPPLIES
POWER CONSUMPTION
1
2
Measured at the maximum clock rate, f
approximately 5 pF loading on each output bit for CMOS output mode.
Input capacitance or resistance refers to the effective impedance between one differential input pin and AGND. Refer to Figure 6 for the equivalent analog input structure.
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Output Voltage
Load Regulation @ 1.0 mA
Reference Input Current (External 1.6 V Reference)
Input Span
Internal Input Common-Mode Voltage
External Input Common-Mode Voltage
Input Resistance
Input Capacitance
Supply Voltage
Supply Current
PSRR
LVDS Outputs
CMOS Outputs (DC Input)
VREF = 1.6 V (3.2 V p-p Analog Input Range)
VREF = 1.6 V
VREF = 1.0 V (External)
AVDD1
AVDD2
DRVDD—LVDS Outputs
DRVDD—CMOS Outputs
I
I
I
I
Offset
Gain
AVDD
AVDD2
DRVDD
DRVDD
1
1
1
1
—LVDS Outputs
—CMOS Outputs
1
2
2
1
1
IN
= 15 MHz, full-scale sine wave, with a 100 Ω differential termination on each pair of output bits for LVDS output mode and
IN
= −1.0 dBFS, DCS on, unless otherwise noted.
Rev. 0 | Page 3 of 36
Temp
Full
Full
Full
Full
25°C
Full
25°C
Full
Full
Full
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
−5
−3
−2
−0.75
−5
3.2
3.14
4.75
3.0
3.0
AD9446BSVZ-80
Guaranteed
Typ
16
±0.1
±0.6
±0.3
±0.4
±3.0
1.6
±2
1.5
3.2
2.0
3.5
1
6
3.3
5.0
3.3
3.3
335
204
68
14
1
0.2
2.4
2.2
Max
+5
+3
+2
+0.75
+5
3.8
3.46
5.25
3.6
3.6
365
234
75
2.6
Min
−5
−3
−2
−0.85
−6
3.2
3.14
4.75
3.0
3.0
AD9446BSVZ-100
Guaranteed
1.9
Typ
16
±0.1
±0.5
±0.3
±0.4
±3.0
1.6
±2
3.2
2.0
3.5
1
6
3.3
5.0
3.3
3.3
368
223
69
14
1
0.2
2.6
2.3
Max
+6
75
+5
+3
+2
+0.85
3.8
3.46
5.25
3.6
3.6
401
255
2.8
AD9446
Unit
Bits
mV
% FSR
% FSR
LSB
LSB
V
mV
μA
LSB rms
V p-p
V p-p
V
V
kΩ
pF
V
V
V
V
mA
mA
mA
mA
mV/V
%/V
W
W