AD9446BSVZ-100 Analog Devices Inc, AD9446BSVZ-100 Datasheet - Page 7

IC ADC 16BIT 100MSPS 100-TQFP

AD9446BSVZ-100

Manufacturer Part Number
AD9446BSVZ-100
Description
IC ADC 16BIT 100MSPS 100-TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9446BSVZ-100

Data Interface
Parallel
Number Of Bits
16
Sampling Rate (per Second)
100M
Number Of Converters
1
Power Dissipation (max)
2.8W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad
Resolution (bits)
16bit
Sampling Rate
100MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Digital
3V To 3.6V
Supply Current
368mA
Number Of Elements
1
Resolution
16Bit
Architecture
Pipelined
Sample Rate
100MSPS
Input Polarity
Bipolar
Input Type
Voltage
Rated Input Volt
±1/±1.6V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.14/4.75V
Single Supply Voltage (max)
3.46/5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
2.8W
Differential Linearity Error
±0.85LSB
Integral Nonlinearity Error
±6LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP EP
Input Signal Type
Differential
Package
100TQFP EP
Number Of Analog Inputs
1
Digital Interface Type
Parallel
Signal To Noise Ratio
79.7(Typ) dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9446-80LVDS/PCBZ - BOARD EVALUATION AD9446-80
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9446BSVZ-100
Manufacturer:
AD
Quantity:
138
Part Number:
AD9446BSVZ-100
Manufacturer:
ADI
Quantity:
132
Part Number:
AD9446BSVZ-100
Manufacturer:
ADI/亚德诺
Quantity:
20 000
TIMING DIAGRAMS
DATA OUT
DCO+
DCO–
CLK–
CLK+
VIN
DCO+
DCO–
CLK+
CLK–
DX
A
IN
N – 1
t
CLKH
t
PD
N – 1
t
t
CLKH
CLKL
N
t
CLKL
t
CPD
N
1/
N – 13
f
N – 13
S
t
PD
N + 1
N + 1
13 CLOCK CYCLES
13 CLOCK CYCLES
N – 12
N – 12
N + 2
Figure 2. LVDS Mode Timing Diagram
Figure 3. CMOS Timing Diagram
Rev. 0 | Page 7 of 36
N – 1
N
N
N + 1
AD9446

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