LTC2439-1CGN Linear Technology, LTC2439-1CGN Datasheet - Page 22

IC ADC 16BIT 16CH MCRPWR 28SSOP

LTC2439-1CGN

Manufacturer Part Number
LTC2439-1CGN
Description
IC ADC 16BIT 16CH MCRPWR 28SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2439-1CGN

Number Of Bits
16
Sampling Rate (per Second)
6.8
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.150", 3.95mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LTC2439-1
APPLICATIO S I FOR ATIO
The effect of this input dynamic current can be analyzed
using the test circuit of Figure 13. The C
includes the LTC2439-1 pin capacitance (5pF typical) plus
the capacitance of the test fixture used to obtain the results
shown in Figures 14 and 15. A careful implementation can
bring the total input capacitance (C
thus achieving better performance than the one predicted
by Figures 14 and 15. For simplicity, two distinct situa-
tions can be considered.
For relatively small values of input capacitance (C
0.01µF), the voltage on the sampling capacitor settles
almost completely and relatively large values for the
source impedance result in only small errors. Such values
for C
performance without significant benefits of signal filtering
and the user is advised to avoid them. Nevertheless, when
small values of C
of input multiplexers, wires, connectors or sensors, the
LTC2439-1 can maintain its accuracy while operating with
relative large values of source resistance as shown in
Figures 14 and 15. These measured results may be slightly
different from the first order approximation suggested
earlier because they include the effect of the actual second
order input network together with the nonlinear settling
process of the input amplifiers. For small C
settling on IN
there is little benefit in trying to match the source imped-
ance for the two pins.
Larger values of input capacitors (C
required in certain configurations for antialiasing or gen-
eral input signal filtering. Such capacitors will average the
input sampling charge and the external source resistance
will see a quasi constant input differential impedance.
When F
the typical differential input resistance is 2MΩ which will
generate a gain error of approximately 1LSB at full scale
for each 60Ω of source resistance driving IN
When F
quency f
typical differential input resistance is 0.28 • 10
22
IN
O
O
will deteriorate the converter offset and gain
EOSC
= LOW (internal oscillator and 50Hz/60Hz notch),
is driven by an external oscillator with a fre-
+
(external conversion clock operation), the
and IN
IN
are unavoidably present as parasitics
U
occurs almost independently and
U
IN
W
+ C
IN
> 0.01µF) may be
PAR
) closer to 5pF
PAR
IN
values, the
U
12
capacitor
+
/f
or IN
EOSC
IN
<
.
Figure 15. –FS Error vs R
Figure 14. +FS Error vs R
V
V
INCM
INCM
+ 0.5V
– 0.5V
Figure 13. An RC Network at IN
–1
–2
–3
0
IN
IN
3
2
1
0
1
V
REF
REF
IN
IN
F
T
1
O
CC
A
V
REF
REF
IN
IN
F
T
+
= GND
= 25°C
O
A
CC
+
= GND
= 2.5V
= 5V
+
= GND
= 25°C
= 5V
= GND
R
R
+
= 5V
= 2.5V
= 5V
10
C
SOURCE
SOURCE
= 5V
= GND
IN
10
C
C
C
IN
IN
IN
= 0.001µF
C
C
IN
C
= 0.001µF
= 100pF
IN
= 0.01µF
C
SOURCE
IN
SOURCE
IN
= 100pF
= 0pF
100
R
= 0.01µF
SOURCE
= 0pF
100
R
SOURCE
C
C
IN
IN
at IN
at IN
(Ω)
1k
(Ω)
1k
+
+
C
≅ 20pF
C
≅ 20pF
or IN
PAR
PAR
or IN
+
10k
and IN
10k
24361 F15
24361 F14
(Small C
IN
LTC2439-1
IN
(Small C
100k
+
100k
24361 F13
IN
IN
24391fa
)
)

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