LTC1400CS8 Linear Technology, LTC1400CS8 Datasheet - Page 12

IC A/D CONV 12BIT W/SHTDN 8-SOIC

LTC1400CS8

Manufacturer Part Number
LTC1400CS8
Description
IC A/D CONV 12BIT W/SHTDN 8-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1400CS8

Number Of Bits
12
Sampling Rate (per Second)
400k
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
160mW
Voltage Supply Source
Dual ±
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1400CS8
Manufacturer:
LT
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Part Number:
LTC1400CS8
Manufacturer:
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Quantity:
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APPLICATIO S I FOR ATIO
LTC1400
Input signal leads to A
(Pin 4) should be kept as short as possible to minimize
noise coupling. In applications where this is not possible, a
shielded cable between source and ADC is recommended.
Also, since any potential difference in grounds between the
signal source and ADC appears as an error voltage in series
with the input signal, attention should be paid to reducing
the ground circuit impedance as much as possible.
Figure 11 shows the recommended system ground connec-
tions. All analog circuitry grounds should be terminated at
12
REFRDY
SLEEP
CONV
V
CLK
NAP
REF
–5V
V
SS
ANALOG SUPPLY
Figure 11. Power Supply Connection
LTC1400
+
GND
GND
U
IN
+
and signal return leads from GND
5V
V
t
11
CC
U
NOTE: NAP AND SLEEP ARE INTERNAL SIGNALS. REFRDY APPEARS AS A BIT IN THE D
GND
GND
DIGITAL CIRCUITRY
W
DIGITAL SUPPLY
t
1
Figure 12. Nap Mode and Sleep Mode Waveforms
+
1400 F11
U
V
5V
CC
the LTC1400 GND pin. The ground return from the LTC1400
Pin 4 to the power supply should be low impedance for
noise free operation. Digital circuitry grounds must be
connected to the digital supply common.
In applications where the ADC data outputs and control sig-
nals are connected to a continuously active microprocessor
bus, it is possible to get errors in the conversion results.
These errors are due to feedthrough from the micropro-
cessor to the successive approximation comparator. The
problem can be eliminated by forcing the microprocessor
into a Wait state during conversion or by using three-state
buffers to isolate the ADC data bus.
Power-Down Mode
Upon power-up, the LTC1400 is initialized to the active
state and is ready for conversion. However, the chip can
be easily placed into the Nap or Sleep mode by exercising
the right combination of CLK and CONV signal. In the Nap
mode all power is off except the internal reference, which is
still active and provides 2.42V output voltage to the other
circuitry. In this mode, the ADC draws only 6mW of power
instead of 75mW (for minimum power, the logic inputs
must be within 500mV of the supply rails). The wake-up
time from the Nap mode to the active mode is 350ns.
t
11
t
1
OUT
WORD.
1400 F12
1400fa

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