HI5714/7CBZ-T Intersil, HI5714/7CBZ-T Datasheet - Page 11

• Manufacturer Part Number: HI5714/7CBZ-T
• Description: CONV A/D 8BIT PREC 24-SOIC
• Manufacturer: Intersil

Specifications of HI5714/7CBZ-T

• Number Of Bits: 8
• Sampling Rate (per Second): 75M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 375mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: HI5714/7CBZ-TTR

Timing Definitions
Aperture Delay: Aperture delay is the time delay between
the external sample command (the rising edge of the clock)
and the time at which the signal is actually sampled. This
delay is due to internal clock path propagation delays.
Aperture Jitter: This is the RMS variation in the aperture
delay due to variation of internal clock path delays.
Data Latency
After the analog sample is taken, the data on the bus is
output at the next rising edge of the clock. This is due to the
output latch of the converter. This delay is specified as the
data latency. After the data latency time, the data
representing each succeeding sample is output at the
following clock pulse. The digital data lags the analog input
by 1 cycle.
Static Performance Definitions
Offset Error and Full-Scale Error use a measured value of
the external voltage reference to determine the ideal plus
and minus full-scale values. The results are all displayed in
LSBs.
HA5020 (Single)
HA5022 (Dual)
HA5024 (Quad)
HA5013 (Triple)
HFA1105 (Single)
HFA1205 (Dual)
HFA1405 (Quad)
HSP9501: Programmable Data Buffer
HSP48410: Histogrammer/accumulating Buffer, 10-Bit Pixel Resolution, 4K x 4K Frame Size
HSP48908: 2-D Convolver, 3 x 3 Kernal Convolution, 8-Bit
HSP48901: 3 x 3 Image Filter, 30MHz, 8-Bit
HSP48212: Video Mixer
HSP43881: Digital Filter, 30MHz, 1-D and 2-D Fir Filters
HSP43168: Dual Fir Filter, 10-Bit, 33/45MHz
CMOS Logic Available in FCT
REFERENCE
ICL8069
AMP
11
HI5714 (8-Bit)
A/D
FIGURE 11. 8-BIT VIDEO COMPONENTS
HSP48410
HSP48908
HSP48901
HSP48212
HSP43881
HSP43168
HSP9501
DSP/µP
HI5714
Bottom Offset Voltage (V
The first code transition should occur at a level 0.5 LSB
above the negative full-scale. Bottom offset voltage is
defined as the deviation of the actual code transition from
this point.
Top Offset Voltage (V
The last code transition should occur for a analog input that
is 1.5 LSBs below positive full-scale. Top Offset Voltage is
defined as the deviation of the actual code transition from
this point.
Differential Linearity Error (DNL)
DNL is the worst case deviation of a code width from the
ideal value of 1 LSB. The converter is guaranteed to have no
missing codes.
Integral Linearity Error (INL)
INL is the worst case deviation of a code center from a best
fit straight line calculated from the measured data.
HI1171 (8-Bit)
CA3338 (8-Bit)
HI5721 (10-Bit)
HI3050 (10-Bit)
D/A
OT
AMP
HA5020 (Single)
HA2842 (Single)
HFA1115 (Single)
HFA1212 (Dual)
HFA1412 (Quad)
)
OB
)