AD7653AST Analog Devices Inc, AD7653AST Datasheet - Page 24

IC ADC 16BIT 1MSPS W/REF 48-LQFP

AD7653AST

Manufacturer Part Number
AD7653AST
Description
IC ADC 16BIT 1MSPS W/REF 48-LQFP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7653AST

Rohs Status
RoHS non-compliant
Number Of Bits
16
Sampling Rate (per Second)
1M
Data Interface
Serial, Parallel
Number Of Converters
1
Power Dissipation (max)
145mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
For Use With
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AD7653
MICROPROCESSOR INTERFACING
The AD7653 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and for ac signal
processing applications interfacing to a digital signal processor.
The AD7653 is designed to interface either with a parallel 8-bit
or 16-bit wide interface, or with a general-purpose serial port or
I/O ports on a microcontroller. A variety of external buffers can
be used with the AD7653 to prevent digital noise from coupling
into the ADC. The following section discusses the use of an
AD7653 with an ADSP-219x SPI equipped DSP.
SPI Interface (ADSP-219x)
Figure 37
the SPI equipped ADSP-219x. To accommodate the slower
speed of the DSP, the AD7653 acts as a slave device and data
must be read after conversion. This mode also allows the daisy-
chain feature. The convert command can be initiated in
response to an internal timer interrupt. The reading process can
be initiated in response to the end-of-conversion signal (BUSY
going LOW) using an interrupt line of the DSP. The serial inter-
shows an interface diagram between the AD7653 and
Rev. A | Page 24 of 28
face (SPI) on the ADSP-219x is configured for master mode—
(MSTR) = 1, Clock Polarity bit (CPOL) = 0, Clock Phase bit
(CPHA) = 1, and SPI Interrupt Enable (TIMOD) = 00—by
writing to the SPI control register (SPICLTx). To meet all timing
requirements, the SPI clock should be limited to 17 Mbps, which
allows it to read an ADC result in less than 1 µs. When a higher
sampling rate is desired, use of one of the parallel interface
modes is recommended.
DVDD
SER/PAR
EXT/INT
RD
INVSCLK
Figure 37. Interfacing the AD7653 to an SPI Interface
AD7653*
* ADDITIONAL PINS OMITTED FOR CLARITY
SDOUT
CNVST
BUSY
SCLK
CS
PFx
SPIxSEL (PFx)
MISOx
SCKx
PFx or TFSx
ADSP-219x*
02966-0-021

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