MAX11359AETL+ Maxim Integrated Products, MAX11359AETL+ Datasheet - Page 22

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MAX11359AETL+

Manufacturer Part Number
MAX11359AETL+
Description
IC DAS SYSTEM 16BIT 40-TQFN
Manufacturer
Maxim Integrated Products
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of MAX11359AETL+

Resolution (bits)
16 b
Sampling Rate (per Second)
477
Data Interface
MICROWIRE™, QSPI™, Serial, SPI™
Voltage Supply Source
Analog and Digital
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16-Bit Data-Acquisition System with ADC, DAC,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
22
PIN
______________________________________________________________________________________
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
CLK32K
32KOUT 32kHz Crystal Output. Connect external 32kHz watch crystal between 32KIN and 32KOUT.
RESET
NAME
UPIO2
UPIO3
UPIO4
DOUT
32KIN
SCM1
SCM2
SCLK
SNO1
SNC1
SNO2
SNC2
OUT1
IN1+
SWA
CLK
IN1-
FBA
DIN
INT
CS
Clock Output. Default is 2.457MHz output clock for µC.
User-Programmable Input/Output 2. See the UPIO2_CTRL Register section for functionality.
User-Programmable Input/Output 3. See the UPIO3_CTRL Register section for functionality.
User-Programmable Input/Output 4. See the UPIO4_CTRL Register section for functionality.
Serial-Data Output. Data is clocked out on SCLK’s falling edge. High impedance when CS is high. When
UPIO/SPI passthrough mode is enabled, DOUT mirrors the state of UPIO1.
Serial-Clock Input. Clocks data in and out of the serial interface.
Serial-Data Input. Data is clocked in on SCLK’s rising edge.
Active-Low Chip-Select Input. Data is not clocked into DIN unless CS is low. When CS is high, DOUT is
high impedance. High impedance when CS is high. When UPIO/SPI passthrough mode is enabled, DOUT
mirrors the state of UPIO1.
Programmable Active-High/Low Interrupt Output. ADC, UPIO wake-up, alarm, and voltage-monitor events.
32kHz Clock Input/Output. Outputs 32kHz clock for µC. Can be programmed as an input by enabling the
IO32E bit to accept an external 32kHz input clock. The RTC, PWM, and watchdog timer always use the
internal 32kHz clock derived from the 32kHz crystal.
Active-Low Open-Drain Reset Output. Remains low while DV
stays low for a timeout period (t
when the watchdog timer times out and holds low during POR until the 32kHz oscillator stabilizes.
32kHz Crystal Input. Connect external 32kHz watch crystal between 32KIN and 32KOUT or drive with
CMOS level as shown in Figure 25.
Analog Switch 1 Normally Open Terminal. Analog input to mux.
Analog Switch 1 Common Terminal. Analog input to mux.
Analog Switch 1 Normally Closed Terminal. Analog input to mux (open on POR).
Analog Switch 2 Normally Open Terminal. Analog input to mux.
Analog Switch 2 Common Terminal. Analog input to mux (open on POR).
Analog Switch 2 Normally Closed Terminal. Analog input to mux.
Amplifier 1 Output. Analog input to mux.
Amplifier 1 Inverting Input. Analog input to mux.
Amplifier 1 Noninverting Input
DACA SPST Shunt Switch Input. Connects to OUTA through a SPST switch.
DACA Force-Sense Feedback Input. Analog input to mux.
DSLP
) after DV
DD
FUNCTION
rises above the 1.8V threshold. RESET also pulses low
DD
is below the 1.8V voltage threshold, and
Pin Description

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