MAX11359AETL+ Maxim Integrated Products, MAX11359AETL+ Datasheet - Page 23

• Manufacturer Part Number: MAX11359AETL+
• Description: IC DAS SYSTEM 16BIT 40-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Data Acquisition System (DAS)r

Specifications of MAX11359AETL+

• Resolution (bits): 16 b
• Sampling Rate (per Second): 477
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

UPIOs, RTC, Voltage Monitors, and Temp Sensor
16-Bit Data-Acquisition System with ADC, DAC,
PIN
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
—
CPOUT
NAME
AGND
DGND
UPIO1
OUTA
OUT2
DV
AV
IN2+
AIN2
AIN1
REG
CF+
IN2-
REF
CF-
EP
DD
DD
______________________________________________________________________________________
DACA Force-Sense Output. Analog input to mux.
Analog Ground
Analog Supply Voltage. Also ADC reference voltage during AV
10µF and 0.1µF capacitors in parallel as close to the pin as possible.
Amplifier 2 Noninverting Input
Amplifier 2 Inverting Input. Analog input to mux.
Amplifier 2 Output. Analog input to mux.
Analog Input 2. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
Analog Input 1. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
Reference Input/Output. Output of the reference buffer amplifier or external reference input. Disabled at
power-up to allow external reference. Reference voltage for ADC and DAC.
Linear Voltage-Regulator Output. Charge-pump-doubler input voltage. Bypass REG with a 10µF capacitor
to DGND for charge-pump regulation.
C har g e- P um p Fl yi ng C ap aci tor Ter m i nal s. C onnect an exter nal 10µF ( typ ) cap aci tor b etw een C F+ and C F- .
C har g e- P um p Outp ut. C onnect an exter nal 10µF ( typ ) r eser voi r cap aci tor b etw een C P O U T and D GN D . Ther e i s
a l ow thr eshol d d i od e b etw een D V
w i thi n 300m V ( typ ) of D V
Digital Supply Voltage. Bypass to DGND with 10µF and 0.1µF capacitors in parallel as close to the pin as
possible.
Digital Ground. Also ground for cascaded linear voltage regulator and charge-pump doubler.
U ser - P r og r am m ab l e Inp ut/O utp ut 1. S ee the U P IO1_C TRL Reg i ster for functionality.
E xp osed P ad . Leave unconnected or connect to AGN D .
D D
.
D D
and C P OU T. When the char g e p um p i s d i sab l ed , C P OU T i s p ul l ed up
FUNCTION
Pin Description (continued)
DD
measurement. Bypass to AGND with
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