TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 12

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

Using Peripheral Delay Block (PDB) to Schedule Analog to Digital Converter (ADC) Conversions
Section Number
17.4 TSI configuration............................................................................................................................................................160
17.5 TSI hardware implementation.........................................................................................................................................165
18.1 Overview.........................................................................................................................................................................167
18.2 Configuration example....................................................................................................................................................169
18.3 PCB design recommendations........................................................................................................................................174
12
17.4.1 Configuration Example......................................................................................................................................162
17.5.1 PCB Routing and Placement..............................................................................................................................166
18.1.1 Introduction........................................................................................................................................................167
18.1.2 Features..............................................................................................................................................................168
18.2.1 PDB-triggered single-ended ADC conversions.................................................................................................169
18.2.2 ADC device hardware implementation..............................................................................................................174
18.2.3 PDB device hardware implementation..............................................................................................................174
18.3.1 Layout guidelines...............................................................................................................................................174
18.3.2 ESD/EMI considerations ...................................................................................................................................175
17.4.1.1 Code Example and Explanation.........................................................................................................163
18.2.1.1 Turn on ADC and PDB clocks...........................................................................................................170
18.2.1.2 Configure System Integration module for ADC defaults..................................................................170
18.2.1.3 Configure Peripheral Delay Block (PDB).........................................................................................170
18.2.1.4 Determine ADC configuration...........................................................................................................171
18.2.1.5 Using ADC driver..............................................................................................................................172
18.2.1.6 Calibrate ADCs..................................................................................................................................172
18.2.1.7 Enable ADC and PDB interrupts.......................................................................................................172
18.2.1.8 Software triggering of PDB...............................................................................................................172
18.2.1.9 Handle ADC and PDB interrupts.......................................................................................................173
18.3.1.1 General routing and placement..........................................................................................................174
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Chapter 18
Title
Freescale Semiconductor
Page