TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 68
TWR-K60N512-KEIL
Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr
Datasheets
1.TWR-ELEV.pdf
(4 pages)
2.TWR-K60N512-KIT.pdf
(8 pages)
3.TWR-K60N512-KIT.pdf
(17 pages)
4.TWR-K60N512-KEIL.pdf
(181 pages)
Specifications of TWR-K60N512-KEIL
Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
- TWR-ELEV PDF datasheet
- TWR-K60N512-KIT PDF datasheet #2
- TWR-K60N512-KIT PDF datasheet #3
- TWR-K60N512-KEIL PDF datasheet #4
- Current page: 68 of 181
- Download datasheet (3Mb)
Configuration examples
The MPU module is designed for less complex memory management without TLB,
paging, dynamic allocation, and virtual memory. It provides lower power consumption
and no paging segmentation; therefore, an MPU is better suited for MCUs.
6.1.4
Configuration examples
6.1.4.1 Region descriptors setup
Example code:
#define TCML_BASE 0x20000000// Upper SRAM bitband region
#define TCML_SIZE 0x00010000
/* MPU Configuration */
MPU_RGD0_WORD2 = 0;// Disable RGD0
// Set RGD1
MPU_RGD1_WORD0 = 0;// Start address
MPU_RGD1_WORD1 = (TCML_BASE + TCML_SIZE);// End Address
MPU_RGD1_WORD2 = 0x0061F7DF;(No magic #’s)// Bus master 3: SM all access (List what the Bus
masters are in addition to #’s)
// Bus master 2: SM all access
// Bus master 2: UM all access
// Bus master 1: SM all access
// Bus master 1: UM all access
// Bus master 0: SM all access
// Bus master 0: UM all access
MPU_RGD1_WORD3 = 0x00000001;// region is valid
// Set RGD2
MPU_RGD2_WORD0 = (TCML_BASE + TCML_SIZE + 0x40);
MPU_RGD2_WORD1 = 0xFFFFFFFF;// End Address
MPU_RGD2_WORD2 = 0x0061F7DF;
MPU_RGD2_WORD3 = 0x00000001;// region is valid
// Enable MPU function
MPU_CESR = 0x00000001;
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
68
Freescale Semiconductor
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