CAT5419WI-25-T1 ON Semiconductor, CAT5419WI-25-T1 Datasheet - Page 11

• Manufacturer Part Number: CAT5419WI-25-T1
• Description: IC POT DPP DUAL 64TAP I2C 24SOIC
• Manufacturer: ON Semiconductor

Specifications of CAT5419WI-25-T1

• Taps: 64
• Resistance (ohms): 25K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 25K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

illustrated in Figure 11. These three−byte instructions
exchange data between the WCR and one of the Data
Registers. The WCR controls the position of the wiper. The
response of the wiper to this action will be delayed by t
A transfer from the WCR (current wiper position), to a Data
Register is a write to non−volatile memory and takes a
maximum of t
between one of the potentiometers and one of its associated
registers; or the transfer can occur between all
potentiometers and one associated register.
complete, as illustrated in Figure 10. These instructions
transfer data between the host/processor and the CAT5419;
either between the host and one of the data registers or
directly between the host and the Wiper Control Register.
These instructions are:
•
•
The basic sequence of the three byte instructions is
Four instructions require a two−byte sequence to
SDA
XFR Data Register to Wiper Control Register
This transfers the contents of one specified Data
Register to the associated Wiper Control Register.
XFR Wiper Control Register to Data Register
This transfers the contents of the specified Wiper
Control Register to the specified associated Data
Register.
SDA
R
S
T
A
T
S
A
R
T
T
ID3 ID2 ID1 ID0
ID3 ID2 ID1 ID0
0
0
Device ID
WR
Device ID
1
1
to complete. The transfer can occur
SDA
0
0
1
1
R
S
T
A
T
A3
A3
ID3
0
A2 A1 A0 A
Address
Internal
Figure 12. Increment/Decrement Instruction Sequence
Device ID
Address
Internal
A2 A1 A0
ID2
1
Figure 11. Three−Byte Instruction Sequence
ID1 ID0
0
Figure 10. Two−Byte Instruction Sequence
1
C
K
A3
A
C
K
I3
Address
A2
Internal
I3
Instruction
Opcode
I2 I1 I0
http://onsemi.com
Instruction
A1
WRL
Opcode
I2
A0
.
I1
11
C
A
K
Register
Address
I0
R1 R0
Data
•
•
Increment/Decrement Command
and 12). The Increment/Decrement command is different
from the other commands. Once the command is issued and
the CAT5419 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in one
segment steps; thereby providing a fine tuning capability to
the host. For each SCL clock pulse (t
HIGH, the selected wiper will move one resistor segment
towards the R
pulse while SDA is LOW, the selected wiper will move one
resistor segment towards the R
I3
Register
Address
The final command is Increment/Decrement (Figure 6
See Instructions format for more detail.
Instruction
R1
Global XFR Data Register to Wiper Control
Register
This transfers the contents of all specified Data Registers
to the associated Wiper Control Registers.
Global XFR Wiper Counter Register to Data
Register
This transfers the contents of all Wiper Control Registers
to the specified associated Data Registers.
Opcode
Data
I2
Pot/WCR
Address
R0 0
0 P0 A
I1
Pot/WCR
Address
I0 R1 R0
C
K
P0
H
Register
Address
terminal. Similarly, for each SCL clock
D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
N
C
1
I
0
Data Register D[7:0]
Pot/WCR
Address
P0
N
C
2
I
WCR[7:0]
L
A
C
K
or
terminal.
N
C
n
I
O
S
T
P
HIGH
D
E
C
1
) while SDA is
D
C
E
n
C
A
K
S
O
P
T
S
O
P
T