X95820WV14I-2.7 Intersil, X95820WV14I-2.7 Datasheet - Page 4

• Manufacturer Part Number: X95820WV14I-2.7
• Description: IC XDCP DUAL 256TAP 10K 14-TSSOP
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X95820WV14I-2.7

• Taps: 256
• Resistance (ohms): 10K
• Number Of Circuits: 2
• Temperature Coefficient: 45 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Resistance In Ohms: 10K
• Number Of Elements: 2
• # Of Taps: 256
• Resistance (max): 10KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (I2C)
• Single Supply Voltage (typ): 3.3V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 14
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Operating Specifications
EEPROM SPECS
SERIAL INTERFACE SPECS
t
D
VccRamp
Hysterisis
SYMBOL
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
(Note 15)
t
t
I
(Note 15)
SU:STA
HD:STA
t
LkgDig
t
I
I
t
Vpor
t
Cpin
f
HIGH
V
LOW
CC1
CC2
DCP
V
BUF
I
V
SCL
t
t
SB
AA
IN
OL
IH
IL
V
(Volatile write/read)
V
(nonvolatile write)
V
Leakage Current, at Pins A0,
A1, A2, SDA, SCL, and WP
Pins
DCP Wiper Response Time
Power-on Recall Voltage
V
Power-up Delay
EEPROM Endurance
EEPROM Retention
WP, A2, A1, A0, SDA, and
SCL input buffer LOW
voltage
WP, A2, A1, A0, SDA, and
SCL Input Buffer HIGH
Voltage
SDA and SCL input buffer
hysterisis
SDA Output Buffer LOW
Voltage, Sinking 4mA
WP, A2, A1, A0, SDA, and
SCL Pin Capacitance
SCL Frequency
Pulse Width Suppression
Time at SDA and SCL Inputs
SCL Falling Edge to SDA
Output Data Valid
Time the Bus Must be Free
Before the Start of a New
Transmission
Clock LOW Time
Clock HIGH Time
START Condition Setup
Time
START Condition Hold Time From SDA falling edge crossing 30% of V
CC
CC
CC
CC
Supply Current
Supply Current
Current (standby)
Ramp Rate
PARAMETER
4
Over the recommended operating conditions unless otherwise specified.
f
Active, Read and Volatile Write States only)
f
Active, Nonvolatile Write State only)
V
V
Voltage at pin from GND to V
SCL falling edge of last bit of DCP Data Byte to
wiper change
Minimum V
V
completed, and
Temperature ≤ 75°C
Any pulse narrower than the max spec is
suppressed.
SCL falling edge crossing 30% of V
exits the 30% to 70% of V
SDA crossing 70% of V
to SDA crossing 70% of V
START condition.
Measured at the 30% of V
Measured at the 70% of V
SCL rising edge to SDA falling edge. Both crossing
70% of V
falling edge crossing 70% of V
SCL
SCL
CC
CC
CC
above Vpor, to DCP Initial Value Register recall
= +5.5V,
= +3.6V,
= 400kHz;SDA = Open; (for I
= 400kHz; SDA = Open; (for I
CC
CC
.
I
I
2
2
at which memory recall occurs
TEST CONDITIONS
C
C
I
2
C
Interface in Standby State
Interface in Standby State
X95820
Interface in standby state
CC
CC
CC
CC
CC
during a STOP condition,
CC
window.
during the following
crossing.
crossing.
CC
.
2
2
C,
CC
C,
, until SDA
CC
to SCL
150,000
0.7*Vcc
0.05*
1300
1300
MIN
-0.3
Vcc
600
600
600
-10
1.8
0.2
50
0
(Note 1)
TYP
Vcc+0.3
0.3*Vcc
MAX
400
900
2.6
0.4
10
10
50
1
3
5
2
1
3
July 18, 2006
UNITS
Cycles
Years
V/ms
kHz
FN8212.2
mA
mA
ms
µA
µA
µA
pF
µs
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V