ADBM-A350-200 Avago Technologies US Inc., ADBM-A350-200 Datasheet - Page 26

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ADBM-A350-200

Manufacturer Part Number
ADBM-A350-200
Description
Vigor Colossus OFN Module
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADBM-A350-200

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
EVENT
Access: Read/Write
Data Type: Bit fi eld.
USAGE: Event detect register (0x02) allows user to determine if any event interrupts (FPD, Motion, Soft click or Button
26
Bit
Field
click) has occurred since the last time it was read. If the MOT bit is set, then the user should read registers 0x03
and 0x04 to get the accumulated motion. Read this register before reading the Delta_Y and Delta_X registers.
Writing anything to this register clears the MOT and OVFL bits, Delta_Y and Delta_X registers. The written data
byte is not saved.
Internal buff ers can accumulate more than eight bits of motion for X or Y. If any of the internal buff ers overfl ow,
then absolute path data is lost and the OVFL bit is set. This bit is cleared once some motion has been read from
the Delta_X and Delta_Y registers, and if the buff ers are not at full scale. Since more data is present in the buff ers,
the cycle of reading the Event, Delta_X and Delta_Y registers should be repeated until the motion bit (MOT) is
cleared. If the Event register has not been read for long time, at 500 cpi it may take up to 16 read cycles to clear
the buff ers, at 1000 cpi, up to 32 cycles. To clear an overfl ow, write anything to this register.
The PIXRDY bit will be set whenever a valid pixel data byte is ready and available in the Pixel_Dump register.
Check that this bit is set before reading from Pixel_Dump. To ensure that the Pixel_Grab pointer has been reset
to pixel 0,0 on the initial write to Pixel_Grab, check to see if PIXFIRST is set to high.
Field Name
MOT
PIXRDY
PIXFIRST
OVF
RESET_ST
BUT_CLICK
SOFT_CLICK
FPD
7
MOT
6
PIXRDY
Description
Motion since last report
0 = No motion
1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers
Bit reset when motion data in Delta_X and Delta_Y registers are cleared
Pixel Dump data byte is available in Pixel_Dump register
0 = data not available
1 = data available
This bit is set when the Pixel_Grab register is written to or when the complete
pixel array has been read, initiating an increment to pixel 0,0.
0 = Pixel_Grab data not from pixel 0,0
1 = Pixel_Grab data is from pixel 0,0
Motion overfl ow, Y and/or X buff er has overfl owed since last report
0 = no overfl ow
1 = Overfl ow has occurred
Reset status bit. Any internal or external reset will set this bit. Write anything to
this register to clear it.
0 = No reset
1 = Reset occurred
Button click report
0 = No Button click
1 = Button click occurred
Bit clear or reset by reading BUTTON_STATUS (0x12) register
Soft click report
0 = No Soft click
1 = Soft click occurred
Bit clear or reset by reading SC_STATUS (0x7F) register
Finger presence detect bit reports a change in fi nger state (fi nger on to fi nger
off and vice versa)
0 = No fi nger state change detected
1 = Finger state change detected
Bit clear or reset by reading FPD_STATUS (0x7A) register
Address: 0x02
Reset Value: Any
5
PIXFIRST
4
OVFL
3
RESET_ST
2
BUT_CLICK
1
SOFT_CLICK FPD
0

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