CS4398-CZZ Cirrus Logic Inc, CS4398-CZZ Datasheet - Page 29

• Manufacturer Part Number: CS4398-CZZ
• Description: IC DAC 120DB 192KHZ W/VC 28TSSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4398-CZZ

• Package / Case: 28-TSSOP
• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 340mW
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Conversion Rate: 216 KSPS
• Resolution: 24 bit
• Interface Type: Serial
• Operating Supply Voltage: 5 V
• Operating Temperature Range: + 70 C
• Maximum Power Dissipation: 340 mW
• Mounting Style: SMD/SMT
• Number Of Dac Outputs: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1155 - BOARD EVAL FOR CS4398 DAC
• Settling Time: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1067-5

DS568F1
7.
** All register access is R/W unless specified otherwise**
7.1
7.2
7.2.1
7.2.2
DSD_SRC
PART4
REGISTER DESCRIPTION
0
0
7
7
Chip ID - Register 01h
Function:
This register is Read-Only. Bits 7 through 3 are the part number ID, which is 01110b (14h), and the remain-
ing Bits (2 through 0) are for the chip revision (Rev. A = 000, Rev. B = 001, ...)
Mode Control 1 - Register 02h
Function:
When set to 0 (default), the dedicated DSD pins will be the active DSD inputs.
When set to 1, the source for DSD inputs will be as follows:
The dedicated DSD pins must be tied low while not in use.
Digital Interface Format (DIF2:0) BITs 6-4
Function:
These bits select the interface format for the serial audio input. The Functional Mode bits determine
whether PCM or DSD mode is selected.
PCM Mode: The required relationship between the Left/Right clock, serial clock and serial data is defined
by the Digital Interface Format, and the options are detailed in Figures 3 through 5.
DSD Input Source Select (DSD_SRC) BIT 7
DSDA input on SDATA pin
DSDB input on LRCK pin
DSD_SCLK input on SCLK pin
DIF2
0
0
0
0
1
1
1
1
PART3
DIF2
6
1
6
0
DIF1
0
0
1
1
0
0
1
1
PART2
DIF1
DIF0
5
1
5
0
0
1
0
1
0
1
0
1
Table 5. Digital Interface Formats - PCM Mode
Left-Justified, up to 24-bit data
I²S, up to 24-bit data
Right-Justified, 16-bit data
Right-Justified, 24-bit data
Right-Justified, 20-bit data
Right-Justified, 18-bit data
Reserved
Reserved
PART1
DIF0
1
0
4
4
Description
PART0
DEM1
3
0
3
0
DEM0
REV2
2
2
0
-
REV1
FM1
0
0
1
1
-
Format
(Default)
1
2
3
4
5
CS4398
REV0
FM0
Figure
0
0
0
-
3
4
5
5
5
5
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