AD9717BCPZ Analog Devices Inc, AD9717BCPZ Datasheet - Page 31

• Manufacturer Part Number: AD9717BCPZ
• Description: IC DAC DUAL 14BIT LO PWR 40LFCSP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9717BCPZ

• Data Interface: Serial
• Number Of Bits: 14
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 86mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LFCSP
• Resolution (bits): 14bit
• Sampling Rate: 125MSPS
• Input Channel Type: Parallel, Serial
• Supply Current: 11mA
• Digital Ic Case Style: CSP
• No. Of Pins: 40
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TERMINOLOGY
Linearity Error or Integral Nonlinearity (INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by
a straight line drawn from zero scale to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized
to full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant as the digital input increases.
Offset Error
Offset error is the deviation of the output current from the
ideal of zero. For I
inputs are all 0. For I
inputs are set to 1.
Gain Error
Gain error is the difference between the actual and the ideal
output span. The actual span is determined by the difference
between the output when all inputs are set to 1 and the output
when all inputs are set to 0.
Output Compliance Range
Output compliance range is the range of allowable voltage at
the output of a current-output DAC. Operation beyond the
maximum compliance limits can cause either output stage
saturation or breakdown, resulting in nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from
the ambient value (25°C) to the value at either T
For offset and gain drift, the drift is reported in ppm of full-
scale range per degree Celsius (ppm FSR/°C). For reference
drift, the drift is reported in parts per million per degree
Celsius (ppm/°C).
OUTP
OUTN
, 0 mA output is expected when the
, 0 mA output is expected when all
MIN
or T
MAX
.
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Power Supply Rejection
Power supply rejection is the maximum change in the full-scale
output as the supplies are varied from minimum to maximum
specified voltages.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band around its final value,
measured from the start of the output transition.
Spurious Free Dynamic Range (SFDR)
SFDR is the difference, in decibels (dB), between the peak
amplitude of the output signal and the peak spurious signal
between dc and the frequency equal to half the input data rate.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured fundamental.
It is expressed as a percentage or in decibels.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the measured output signal
to the rms sum of all other spectral components below the
Nyquist frequency, excluding the first six harmonics and dc.
The value for SNR is expressed in decibels (dB).
Adjacent Channel Leakage Ratio (ACLR)
ACLR is the ratio in decibels relative to the carrier (dBc)
between the measured power within a channel relative to its
adjacent channel.
Complex Image Rejection
In a traditional two-part upconversion, two images are created
around the second IF frequency. These images have the effect of
wasting transmitter power and system bandwidth. By placing
the real part of a second complex modulator in series with the
first complex modulator, either the upper or lower frequency
image near the second IF can be rejected.
AD9714/AD9715/AD9716/AD9717