DAC121S101CIMK/NOPB National Semiconductor, DAC121S101CIMK/NOPB Datasheet - Page 2

CONV D/A 12BIT MICRO PWR TSOT236

DAC121S101CIMK/NOPB

Manufacturer Part Number
DAC121S101CIMK/NOPB
Description
CONV D/A 12BIT MICRO PWR TSOT236
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of DAC121S101CIMK/NOPB

Settling Time
12µs
Number Of Bits
12
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.72mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-6, TSOT-6
Number Of Channels
1
Resolution
12b
Interface Type
Serial (3-Wire, SPI, QSPI, Microwire)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±8LSB
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
6
Package Type
TSOT
For Use With
DAC121S101EVAL - BOARD EVALUATION DAC121S101
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DAC121S101CIMK
DAC121S101CIMKTR
www.national.com
(SOT-23)
Ordering Information
Block Diagram
Pin Descriptions
Pin No.
TSOT
1
2
3
4
5
6
DAC121S101CIMM
DAC121S101CIMMX
DAC121S101CIMK
DAC121S101CIMKX
DAC121S101QCMK
DAC121S101QCMKX
DAC121S101EVAL
Order Numbers
Pin No.
MSOP
2, 3
4
8
1
7
6
5
Symbol
SYNC
SCLK
V
GND
D
NC
V
OUT
IN
A
−40°C
−40°C
−40°C
−40°C
−40°C
−40°C
Temperature Range
Evaluation Board
DAC Analog Output Voltage.
Ground reference for all on-chip circuitry.
Power supply and Reference input. Should be decoupled to GND.
Serial Data Input. Data is clocked into the 16-bit shift register on the falling edges of SCLK
after the fall of SYNC.
Serial Clock Input. Data is clocked into the input shift register on the falling edges of this pin.
Frame synchronization input for the data input. When this pin goes low, it enables the input
shift register and data is transferred on the falling edges of SCLK. The DAC is updated on
the 16th clock cycle unless SYNC is brought high before the 16th clock, in which case the
rising edge of SYNC acts as an interrupt and the write sequence is ignored by the DAC.
No Connect. There is no internal connection to these pins.
T
T
T
T
T
T
A
A
A
A
A
A
+105°C
+105°C
+105°C
+105°C
+125°C
+125°C
2
MSOP T/R
TSOT T/R
TSOT T/R
Package
MSOP
TSOT
TSOT
TSOT
Description
Top Mark
X61Q
X60C
X61C
Grade Production Flow
Qualified; Automotive
AEC-Q100 Grade 1
Feature
20114903

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