DAC121S101CIMK/NOPB National Semiconductor, DAC121S101CIMK/NOPB Datasheet - Page 5

CONV D/A 12BIT MICRO PWR TSOT236

DAC121S101CIMK/NOPB

Manufacturer Part Number
DAC121S101CIMK/NOPB
Description
CONV D/A 12BIT MICRO PWR TSOT236
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of DAC121S101CIMK/NOPB

Settling Time
12µs
Number Of Bits
12
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.72mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-6, TSOT-6
Number Of Channels
1
Resolution
12b
Interface Type
Serial (3-Wire, SPI, QSPI, Microwire)
Single Supply Voltage (typ)
3.3/5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Requirement
Single
Output Type
Voltage
Integral Nonlinearity Error
±8LSB
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
6
Package Type
TSOT
For Use With
DAC121S101EVAL - BOARD EVALUATION DAC121S101
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DAC121S101CIMK
DAC121S101CIMKTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DAC121S101CIMK/NOPB
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
DAC121S101CIMK/NOPB
Manufacturer:
TI
Quantity:
20
Part Number:
DAC121S101CIMK/NOPB
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
DAC121S101CIMK/NOPB
Manufacturer:
TI
Quantity:
6 987
f
t
SR
t
1/f
t
t
t
t
t
t
t
SCLK
s
WU
H
L
SUCL
SUD
DHD
CS
SYNC
Symbol
A.C. and Timing Characteristics
The following specifications apply for V
range 48 to 4047. Boldface limits apply for T
SCLK
SCLK Frequency
Output Voltage Settling Time
(Note
Output Slew Rate
Glitch Impulse
Digital Feedthrough
Wake-Up Time
SCLK Cycle Time
SCLK High time
SCLK Low Time
Set-up Time SYNC to SCLK Rising
Edge
Data Set-Up Time
Data Hold Time
SCLK fall to rise of SYNC
SYNC High Time
10)
Parameter
A
= +2.7V to +5.5V, R
MIN
400h to C00h code
change, R
00Fh to FF0h code
change, R
Code change from 800h to 7FFh
V
V
V
V
2.7
3.6
A
A
A
A
= 5V
= 3V
= 5V
= 3V
T
A
V
V
A
A
T
L
L
MAX
3.6
5.5
= 2kΩ
= 2kΩ
Conductions
L
= 2kΩ to GND, C
: all other limits T
5
C
C
C
C
L
L
L
L
= 500 pF
= 500 pF
200 pF
200 pF
L
A
= 200 pF to GND, f
= 25°C, unless otherwise specified.
Typical
−15
0.5
2.5
2.5
12
12
12
39
−2
8
8
1
6
5
5
0
9
5
SCLK
= 30 MHz, input code
Limits
4.5
30
10
33
13
13
20
10
0
5
3
1
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MHz (max)
µs (max)
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
nV-sec
nV-sec
Units
V/µs
µs
µs
µs
µs
µs

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