AD9785BSVZ Analog Devices Inc, AD9785BSVZ Datasheet - Page 5

• Manufacturer Part Number: AD9785BSVZ
• Description: IC DAC 12BIT 800MSPS 100TQFP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9785BSVZ

• Data Interface: Serial
• Number Of Bits: 12
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 450mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
• Resolution (bits): 12bit
• Sampling Rate: 800MSPS
• Input Channel Type: Parallel
• Digital Ic Case Style: QFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Parameter
LATENCY (DACCLK CYCLES)
POWER-UP TIME
1
2
3
4
AC SPECIFICATIONS
T
otherwise noted.
Table 3.
Parameter
SPURIOUS-FREE DYNAMIC RANGE (IN-BAND SFDR)
TWO-TONE INTERMODULATION DISTORTION (IMD)
NOISE SPECTRAL DENSITY (NSD), EIGHT TONE, 500 kHz TONE
WCDMA ADJACENT CHANNEL LEAKAGE RATIO (ACLR),
WCDMA SECOND ADJACENT CHANNEL LEAKAGE RATIO
Timing vs. temperature and data valid windows are delineated in Table 25.
Measured from SPI_CSB rising edge on Register 0x00; toggle Bit 4 from 0 to 1. VREF decoupling capacitor = 0.1 μF.
Measured from SPI_CSB rising edge on Register 0x05 or Register 0x07; toggle Bit 15 or Bit 14 from 0 to 1.
Measured from SPI_CSB rising edge on Register 0x05 or Register 0x07; toggle Bit 15 or Bit 14 from 1 to 0.
MIN
f
f
f
f
f
f
f
f
SPACING
f
f
f
SINGLE CARRIER
f
f
(ACLR), SINGLE CARRIER
f
f
1× Interpolation
2× Interpolation
4× Interpolation
8× Interpolation
Inverse Sinc
DAC Wake-Up Time
DAC Sleep Time
DACCLK
DACCLK
DACCLK
DACCLK
DATA
DATA
DATA
DATA
DACCLK
DACCLK
DACCLK
DACCLK
DACCLK
DACCLK
DACCLK
to T
= 200 MSPS, f
= 200 MSPS, f
= 200 MSPS, f
= 100 MSPS, f
= 200 MSPS, f
= 200 MSPS, f
= 200 MSPS, f
= 800 MSPS, f
= 200 MSPS, f
= 400 MSPS, f
= 800 MSPS, f
= 491.52 MSPS, f
= 491.52 MSPS, f
= 491.52 MSPS, f
= 491.52 MSPS, f
MAX
, AVDD33 = 3.3 V, DVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, I
2
4
OUT
OUT
OUT
OUT
3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 50 MHz 1× Interpolation
= 50 MHz 2× Interpolation
= 100 MHz 4× Interpolation
= 100 MHz 8× Interpolation
OUT
OUT
OUT
OUT
= 70 MHz 1× Interpolation
= 70 MHz 2× Interpolation
= 70 MHz 4× Interpolation
= 40 MHz 8× Interpolation
= 80 MHz
= 80 MHz
= 80 MHz
= 100 MHz 4× Interpolation
= 200 MHz 4× Interpolation
= 100 MHz 4× Interpolation
= 200 MHz 4× Interpolation
Test Conditions/Comments
With or without modulation
With or without modulation
With or without modulation
With or without modulation
I
I
OUT
OUT
current settling to 1%
current to less than 1% of full scale
Rev. A | Page 5 of 64
Min
AD9785
80
80
78
85
80
78
78
70
−154
−154
−154
78
72
80
78
Typ
Max
Min
OUTFS
AD9787
= 20 mA, maximum sample rate, unless
82
82
80
87
82
79
79
70
−157
−158
−159
80
74
82
80
Typ
AD9785/AD9787/AD9788
Max
Min
Min
40
83
Typ
155
294
18
260
22
22
AD9788
83
83
81
90
83
80
80
70
−158
−161
−162
82
76
88
82
Typ
Max
Max
Unit
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBm/Hz
dBm/Hz
dBm/Hz
dBc
dBc
dBc
dBc
Unit
Cycles
Cycles
Cycles
Cycles
Cycles
ms
ms
ms