AD5452YRMZ Analog Devices Inc, AD5452YRMZ Datasheet - Page 18

IC DAC 12BIT MULT 50MHZ 8-MSOP

AD5452YRMZ

Manufacturer Part Number
AD5452YRMZ
Description
IC DAC 12BIT MULT 50MHZ 8-MSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD5452YRMZ

Data Interface
Serial
Design Resources
Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139)
Settling Time
110ns
Number Of Bits
12
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
55µW
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Resolution (bits)
12bit
Sampling Rate
2.7MSPS
Input Channel Type
Serial
Supply Voltage Range - Analogue
2.5V To 5.5V
Supply Current
400nA
Digital Ic Case
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD5450/AD5451/AD5452
For D = 1 − 2
As D is reduced, the output voltage increases. For small values
of the digital fraction D, it is important to ensure that the
amplifier does not saturate and that the required accuracy is
met. For example, an 8-bit DAC driven with the binary code
0x10 (00010000), i.e., 16 decimal, in the circuit of Figure 45
should cause the output voltage to be 16 times V
However, if the DAC has a linearity specification of ±0.5 LSB,
then D can have the weight anywhere in the range 15.5/256 to
16.5/256 so that the possible output voltage is in the range
15.5 V
itself has a maximum error of 0.2%.
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC.
Because only a fraction, D, of the current in the V
routed to the I
follows:
where R is the DAC resistance at the V
For a DAC leakage current of 10 nA, R = 10 kΩ, and a gain
(i.e., 1/D) of 16 the error voltage is 1.6 mV.
REFERENCE SELECTION
When selecting a reference for use with this series of current-
output DACs, pay attention to the reference’s output voltage
temperature coefficient specification. This parameter not only
affects the full-scale error, but also may affect the linearity (INL
and DNL) performance. The reference temperature coefficient
should be consistent with the system accuracy specifications.
For example, an 8-bit system is required to hold its overall
V
Output
OUT
IN
to 16.5 V
Figure 45. Current-Steering DAC Used as a Divider or
=
Error
−n
NOTE
ADDITIONAL PINS OMITTED FOR CLARITY
V
D
OUT
, the output voltage is
IN
1 terminal, the output voltage has to change as
IN
=
V
Voltage
—an error of 3%, even though the DAC
IN
Programmable Gain Element
I
(
OUT
1
1
V
2
R
IN
FB
n
Due
GND
)
V
V
DD
DD
to
V
Leakage
REF
REF
terminal.
=
(
Leakage
V
OUT
IN
REF
.
terminal is
×
R
/ )
D
Rev. 0 | Page 18 of 28
specification to within 1 LSB over the temperature range 0°C to
50°C, and the system’s maximum temperature drift should be
less than 78 ppm/°C.
A 12-bit system within 2 LSBs requires a maximum drift of
10 ppm/°C. Choosing a precision reference with a low output
temperature coefficient minimizes this error source. Table 7
suggests some of the dc references available from Analog
Devices that are suitable for use with this range of current-
output DACs.
AMPLIFIER SELECTION
The primary requirement for the current-steering mode is an
amplifier with low input bias currents and low input offset
voltage. The input offset voltage of an op amp is multiplied by
the variable gain of the circuit due to the code-dependent
output resistance of the DAC. A change in this noise gain
between two adjacent digital fractions produces a step change in
the output voltage due to the amplifier’s input offset voltage.
This output voltage change is superimposed on the desired
change in output between the two codes and gives rise to a
differential linearity error, which if large enough, could cause
the DAC to be nonmonotonic.
The input bias current of an op amp also generates an offset at
the voltage output as a result of the bias current flowing in the
feedback resistor R
low enough to prevent significant errors in 12-bit applications.
However, for 14-bit applications, some consideration should be
given to selecting an appropriate amplifier.
Common-mode rejection of the op amp is important in
voltage-switching circuits, because it produces a code-
dependent error at the voltage output of the circuit. Most op
amps have adequate common-mode rejection for use at 8-, 10-,
and 12-bit resolution.
Provided the DAC switches are driven from true wideband low
impedance sources (V
Consequently, the slew rate and settling time of a voltage-
switching DAC circuit is determined largely by the output op
amp. To obtain minimum settling time in this configuration, it
is important to minimize capacitance at the V
voltage output node in this application) of the DAC. This is
done by using low input-capacitance buffer amplifiers and
careful board design.
Most single-supply circuits include ground as part of the analog
signal range, which in turns requires an amplifier that can
handle rail-to-rail signals. There is a large range of single-supply
amplifiers available from Analog Devices.
FB
. Most op amps have input bias currents
IN
and AGND), they settle quickly.
REF
node (the

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