AD5452YRMZ Analog Devices Inc, AD5452YRMZ Datasheet - Page 7

• Manufacturer Part Number: AD5452YRMZ
• Description: IC DAC 12BIT MULT 50MHZ 8-MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5452YRMZ

• Data Interface: Serial
• Design Resources: Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139)
• Settling Time: 110ns
• Number Of Bits: 12
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 55µW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Resolution (bits): 12bit
• Sampling Rate: 2.7MSPS
• Input Channel Type: Serial
• Supply Voltage Range - Analogue: 2.5V To 5.5V
• Supply Current: 400nA
• Digital Ic Case: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
TSOT
8
7
6
5
4
3
2
1
MSOP
1
2
3
4
5
6
7
8
SYNC
V
Figure 3. TSOT Pin Configuration
Mnemonic
I
GND
SCLK
SDIN
SYNC
V
V
R
V
R
OUT
REF
DD
REF
FB
DD
FB
1
1
2
3
4
AD5450/
AD5451/
AD5452
Function
DAC Current Output.
Ground Pin.
Serial Clock Input. By default, data is clocked in the input shift register upon the falling edge of the serial
clock input. Alternatively, by means of the serial control bits, the device may be configured such that data is
clocked in the shift register upon the rising edge of SCLK.
Serial Data Input. Data is clocked in the 16-bit input register upon the active edge of the serial clock input.
By default, in power-up mode, data is clocked in the shift register upon the falling edge of SCLK. The
control bits allow the user to change the active edge to a rising edge.
Active Low Control Input. This is the frame synchronization signal for the input data. Data is loaded to the
shift register upon the active edge of the following clocks.
Positive Power Supply Input. These parts can operate from a supply of 2.5 V to 5.5 V.
DAC Reference Voltage Input.
DAC Feedback Resistor. Establish voltage output for the DAC by connecting to external amplifier output.
8
7
6
5
I
GND
SCLK
SDIN
OUT
1
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SCLK
I
SDIN
OUT
GND
Figure 4. MSOP Pin Configuration
1
1
2
3
4
AD5452
AD5450/AD5451/AD5452
8
7
6
5
R
V
V
SYNC
FB
REF
DD