PI7C8150ND Pericom Semiconductor, PI7C8150ND Datasheet - Page 4

• Manufacturer Part Number: PI7C8150ND
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ND

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Case: BGA
• Dc: 04+
• Lead Free Status / Rohs Status: Not Compliant

TABLE OF CONTENTS
1
2
3
4
2.1
2.2
2.3
2.4
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
4.1
4.2
INTRODUCTION ................................................................................................................................ 1
SIGNAL DEFINITIONS ..................................................................................................................... 2
2.2.1
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
PCI BUS OPERATION ..................................................................................................................... 10
3.5.1
3.5.2
3.5.3
3.5.4
3.5.5
3.5.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.6.7
3.7.1
3.7.2
3.7.3
3.7.4
3.8.1
3.8.2
3.8.3
3.8.4
ADDRESS DECODING..................................................................................................................... 29
4.2.1
4.2.2
S
S
PIN LIST – 208-PIN FQFP............................................................................................................. 7
PIN LIST – 256-BALL PBGA........................................................................................................ 9
TYPES OF TRANSACTIONS ..................................................................................................... 10
SINGLE ADDRESS PHASE........................................................................................................ 11
DEVICE SELECT (DEVSEL_L) GENERATION....................................................................... 11
DATA PHASE.............................................................................................................................. 12
WRITE TRANSACTIONS .......................................................................................................... 12
READ TRANSACTIONS ............................................................................................................ 15
CONFIGURATION TRANSACTIONS ...................................................................................... 19
TRANSACTION TERMINATION.............................................................................................. 23
ADDRESS RANGES ................................................................................................................... 29
I/O ADDRESS DECODING ........................................................................................................ 29
IGNAL
IGNALS
PRIMARY BUS INTERFACE SIGNALS ............................................................................ 2
CLOCK SIGNALS ................................................................................................................. 5
MISCELLANEOUS SIGNALS............................................................................................. 5
GENERAL PURPOSE I/O INTERFACE SIGNALS .......................................................... 6
JTAG BOUNDARY SCAN SIGNALS .................................................................................. 6
POWER AND GROUND....................................................................................................... 7
MEMORY WRITE TRANSACTIONS................................................................................ 12
MEMORY WRITE AND INVALIDATE ............................................................................ 13
DELAYED WRITE TRANSACTIONS............................................................................... 13
WRITE TRANSACTION ADDRESS BOUNDARIES....................................................... 14
BUFFERING MULTIPLE WRITE TRANSACTIONS..................................................... 15
FAST BACK-TO-BACK TRANSACTIONS ....................................................................... 15
PREFETCHABLE READ TRANSACTIONS.................................................................... 15
NON-PREFETCHABLE READ TRANSACTIONS.......................................................... 16
READ PREFETCH ADDRESS BOUNDARIES ............................................................... 16
DELAYED READ REQUESTS .......................................................................................... 17
DELAYED READ COMPLETION WITH TARGET ........................................................ 17
DELAYED READ COMPLETION ON INITIATOR BUS................................................ 18
FAST BACK-TO-BACK READ TRANSACTION ............................................................. 19
TYPE 0 ACCESS TO PI7C8150 ......................................................................................... 19
TYPE 1 TO TYPE 0 CONVERSION .................................................................................. 20
TYPE 1 TO TYPE 1 FORWARDING................................................................................. 21
SPECIAL CYCLES ............................................................................................................. 22
MASTER TERMINATION INITIATED BY PI7C8150.................................................... 24
MASTER ABORT RECEIVED BY PI7C8150................................................................... 24
TARGET TERMINATION RECEIVED BY PI7C8150 .................................................... 25
TARGET TERMINATION INITIATED BY PI7C8150 .................................................... 27
I/O BASE AND LIMIT ADDRESS REGISTER................................................................ 30
ISA MODE........................................................................................................................... 31
T
.......................................................................................................................................... 2
YPES
................................................................................................................................. 2
iv
March 19, 2003 – Revision 1.04
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
PI7C8150