ISP1581BD,518 NXP Semiconductors, ISP1581BD,518 Datasheet - Page 19

• Manufacturer Part Number: ISP1581BD,518
• Manufacturer: NXP Semiconductors

Specifications of ISP1581BD,518

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 5:
9397 750 13462
Product data
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
DEVEN
R/W
9.2.1 Address register (address: 00H)
7
0
0
9.1 Register access
9.2 Initialization registers
Register access depends on the bus width used:
Endpoint specific registers are indexed via the Endpoint Index register. The target
endpoint must be selected first, before accessing the following registers:
Remark: All reserved bits are not implemented. The bus and bus reset values are not
defined. Therefore, writing to these reserved bits will have no effect.
This register is used to set the USB assigned address and enable the USB device.
Table 5
The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on
reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, the firmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The new device address is activated when the host acknowledges
the empty packet.
Table 6:
Bit
7
6 to 0
•
•
•
•
•
•
•
•
8-bit bus: multi-byte registers are accessed lower byte (LSByte) first.
16-bit bus: for single-byte registers the upper byte (MSByte) must be ignored.
Buffer Length
Control Function
Data Port
Endpoint MaxPacketSize
Endpoint Type
Short Packet.
6
shows the Address register bit allocation.
Endpoint Configuration register: bit description
Symbol
DEVEN
DEVADDR[6:0]
Rev. 06 — 23 December 2004
5
Description
A logic 1 enables the device.
This field specifies the USB device address.
4
DEVADDR[6:0]
R/W
00H
00H
3
Hi-Speed USB peripheral controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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