CY8C5246AXI-054 Cypress Semiconductor Corp, CY8C5246AXI-054 Datasheet - Page 57

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CY8C5246AXI-054

Manufacturer Part Number
CY8C5246AXI-054
Description
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY8C5246AXI-054

Lead Free Status / Rohs Status
Compliant
Table 11-3. AC Specifications
Document Number: 001-55034 Rev. *F
Notes
F
F
Svdd
Tio_init
Tstartup
Tsleep
Thibernate Wakeup form hibernate mode -
Parameter
8. The current consumption of additional peripherals that are implemented only in programmed logic blocks can be found in their respective data sheets, available in
9. Based on device characterization (Not production tested).
CPU
busclk
PSoC Creator, the integrated design environment. To compute total current, find CPU current at frequency of interest and add peripheral currents for your particular
system from the device data sheet and component data sheets.
CPU frequency
Bus frequency
Vdd ramp rate
Time from V
IPOR to I/O ports set to their reset
states
Time from V
PRES to CPU executing code at
reset vector
Wakeup from limited active mode -
Application of non-LVD interrupt to
beginning of execution of next CPU
instruction
Wakeup from sleep mode - Occur-
rence of LVD interrupt to beginning
of execution of next CPU instruction
Application of external interrupt to
beginning of execution of next CPU
instruction
Description
DDD
DDD
/V
/V
DDA
DDA
[9]
/Vccd/Vcca ≥
/Vccd/Vcca ≥
PRELIMINARY
1.71 V ≤ V
1.71 V ≤ V
Vcca/Vccd = regulated from
V
mode (12 MHz typ.)
DDA
/V
DDD
DDD
DDD
, no PLL used, IMO boot
Conditions
≤ 5.5 V
≤ 5.5 V
PSoC
®
5: CY8C52 Family Data Sheet
Min
DC
DC
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
Max
100
40
40
10
66
12
15
1
Page 57 of 88
Units
MHz
MHz
V/ns
µs
µs
µs
µs
µs
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