5962-8960101B2A QP SEMICONDUCTOR, 5962-8960101B2A Datasheet - Page 4

• Manufacturer Part Number: 5962-8960101B2A
• Manufacturer: QP SEMICONDUCTOR

Specifications of 5962-8960101B2A

• Logic Family: ACT
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Polarity: Non-Inverting
• Operating Supply Voltage (typ): 5V
• Propagation Delay Time: 13.5ns
• Output Type: 3-State
• Low Level Output Current: 24mA
• High Level Output Current: -24mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -55C to 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / Rohs Status: Not Compliant

DSCC FORM 2234
APR 97
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
Wilson Boulevard, Arlington, VA 22201-3834.)
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
2. APPLICABLE DOCUMENTS
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
ELECTRONIC INDUSTRIES ALLIANCE (EIA)
(Copies of these documents are available online at
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes B, S, Q, and V shall be in accordance with
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
(Copies of these documents are available online at
DEPARTMENT OF DEFENSE SPECIFICATION
DEPARTMENT OF DEFENSE HANDBOOKS
EIA/JEDEC Standard No. 78 - IC Latch-Up Test
JEDEC Standard No. 20 - Standardized for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed
DEPARTMENT OF DEFENSE STANDARDS
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
MIL-STD-883
MIL-STD-1835 -
MIL-HDBK-103 -
MIL-HDBK-780 -
DEFENSE SUPPLY CENTER COLUMBUS
MICROCIRCUIT DRAWING
COLUMBUS, OHIO 43216-5000
STANDARD
-
Interface Standard Electronic Component Case Outlines.
Standard Microcircuit Drawings.
Test Method Standard Microcircuits.
List of Standard Microcircuit Drawings.
CMOS Devices.
http://www.jedec.org
http://assist.daps.dla.mil/quicksearch/
SIZE
A
or from the Electronic Industries Alliance, 2500
REVISION LEVEL
or
E
http://assist.daps.dla.mil
SHEET
5962-89601
4
or from