CY7C53150-20AI Cypress Semiconductor Corp, CY7C53150-20AI Datasheet

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CY7C53150-20AI

Manufacturer Part Number
CY7C53150-20AI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C53150-20AI

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant

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Cypress Semiconductor Corporation
Document #: 38-10001 Rev. *D
Features
Notes:
1.
2.
• Three eight-bit pipelined processors for concurrent
• 11-pin I/O port programmable in 34 modes for fast appli-
• Two 16-bit timer/counters for measuring and gener-
• Five-pin communication port that supports direct
• Programmable pull-ups on IO4–IO7 and 20-mA sink
• Unique 48-bit ID number in every device to facilitate
• Low operating current; sleep mode operation for
• 0.35- m Flash process technology
• 5.0V operation
• On-chip LVD circuit to prevent nonvolatile memory
• 2,048 bytes of SRAM for buffering network data,
• 512 bytes (CY7C53150), 2048 bytes (CY7C53120E2),
• Addresses up to 58 KB of external memory
• 10 KB (CY7C53120E2), 12 KB (CY7C53120E4) of ROM
• Maximum input clock operation of 20 MHz
• 64-pin TQFP package (CY7C53150)
• 32-pin SOIC or 44-pin TQFP package (CY7C53120)
Logic Block Diagram
processing of application code and network traffic
cation program development
ating I/O device waveforms
connect and network transceiver interfaces
current on IO0–IO3
network installation and management
reduced current consumption
corruption during voltage drops
system, and application data storage
4096 bytes (CY7C53120E4) of Flash memory with
on-chip charge pump for flexible storage of configu-
ration data and application code
(CY7C53150)
containing LonTalk network protocol firmware
(CY7C53150), 10 MHz (CY7C53120E2), 40 MHz
(CY7C53120E4) over a –40°C to 85°C
range
Rare combinations of wake-up events occurring during the go to sleep sequence could produce unexpected sleep behavior. For details please refer to Cypress’s
Neuron Metastability Description application note.
Maximum Junction Temperature is 105°C. T
Control Processor
Media Access
(CY7C53120)
Application
Processor
Processor
2 KB RAM
Network
Flash
ROM
[1]
Junction
[2]
= T
temperature
Ambient
3901 North First Street
Address Bus
Data Bus
+ V•I•
Internal
Internal
(0:15)
(0:7)
JA
. 32-pin SOIC
Neuron
Functional Description
The CY7C531x0 Neuron
LonWorks distributed intelligent control networks. It incorpo-
rates, on a single chip, the necessary communication and
control functions, both in hardware and firmware, that facilitate
the design of a LonWorks node.
The CY7C531x0 contains a very flexible five-pin communi-
cation port that can be configured to interface with a wide
variety of media transceivers at a wide range of data rates. The
most common transceiver types are twisted-pair, powerline,
RF, IR, fiber-optics, and coaxial.
The CY7C531x0 is manufactured using state-of-the-art
0.35- m Flash technology, providing to designers the most
cost-effective Neuron chip solution.
Services at every layer of the OSI networking reference model
are implemented in the LonTalk firmware-based protocol
stored in 10-KB ROM (CY7C53120E2), 12-KB ROM
(CY7C53120E4), or off-chip memory (CY7C53150). The
firmware also contains 34 preprogrammed I/O drivers, greatly
simplifying application programming. The application program
is stored in the Flash memory (CY7C53120) and/or off-chip
memory (CY7C53150), and may be updated by downloading
over the network.
The CY7C53150 incorporates an external memory interface
that can address up to 64 KB with 6 KB of the address space
mapped internally. LonWorks nodes that require large appli-
cation programs can take advantage of this external memory
capability.
The CY7C53150 Neuron chip is an exact replacement for the
Motorola MC143150Bx and Toshiba TMPN3150B1 devices.
The CY7C53120E2 Neuron chip is an exact replacement for
the Motorola MC143120E2 device since it contains the same
firmware in ROM.
JA
= 51C/W. 44-pin TQFP
®
Chip Network Processor
Communications
San Jose
Clock, and
Counters
Oscillator,
I/O Block
2 Timer/
Control
Port
,
CA 95134
JA
External
Address/Data Bus
(CY7C53150)
chip implements a node for
= 43C/W. 64-pin TQFP
Revised March 24, 2003
CP4
CP0
IO10
IO0
CLK1
CLK2
SERVICE
RESET
CY7C53150
CY7C53120
408-943-2600
JA
= 44C/W.

CY7C53150-20AI Summary of contents

Page 1

... KB with the address space mapped internally. LonWorks nodes that require large appli- cation programs can take advantage of this external memory capability. The CY7C53150 Neuron chip is an exact replacement for the Motorola MC143150Bx and Toshiba TMPN3150B1 devices. [2] temperature The CY7C53120E2 Neuron chip is an exact replacement for the Motorola MC143120E2 device since it contains the same firmware in ROM ...

Page 2

... Pin Indicator Notes: 3. The smaller dimple at the bottom left of the marking indicates pin Connect (NC) — Should not be used. (These pins may be used for internal testing.) Document #: 38-10001 Rev. *D CY7C53150 64-lead Thin Quad Flat Pack CY7C53150-20AI CY7C53150 CY7C53120 32 CP4 CP3 31 30 CP2 ...

Page 3

... IO0 7 26 SERVICE CLK2 14 19 CLK1 Document #: 38-10001 Rev IO5 35 IO6 IO6 36 IO5 IO7 IO8 IO9 IO10 RESET CP4 DD 42 IO4 CP3 CP1 IO3 43 CP0 [ CP2 PIN 1 INDICATOR CY7C53150 CY7C53120 44-lead QFP 22 NC CP1 21 CP0 CP2 18 CY7C53120Ex-yyAI CLK1 15 CLK2 Page ...

Page 4

... All Neuron chips require system firmware to be present when they are powered up. In the case of the CY7C53120 family, this firmware is preprogrammed in the factory in an on-chip ROM. In the case of the CY7C53150, the system firmware must be present in the first off-chip nonvolatile memory such as Flash, EPROM, EEPROM, or NVRAM. ...

Page 5

... LonTalk network from an external network management tool. For the CY7C53150, the user application program is stored in on-chip Flash Memory and also in off-chip memory. The user program may initially be programmed into the off-chip memory device using a device programmer. ...

Page 6

... CY7C53120E2, CY7C53120E4, and CY7C53150 Notes: 11. Standard outputs are IO4–IO10, CP0, CP1, and CP4. (RESET is an open drain input/output. CLK2 must have < load.) For CY7C53150, standard outputs also include A0–A15, D0–D7, E, and R/W. 12. IO4–IO7 and SERVICE have configurable pull-ups. RESET has a permanent pull-up. ...

Page 7

... External Memory Interface Timing — CY7C53150, V Parameter t Memory Cycle Time (System Clock Period) cyc PW Pulse Width, E High EH [16] PW Pulse Width, E Low EL t Delay, E High to Address Valid AD t Address Hold Time After E High AH t Delay, E High to R/W Valid Read RD t R/W Hold Time Read After E High ...

Page 8

... OH V – Measured low output drive level OL V TEST SIGNAL 1 LOAD Address DSR Data In t DHR t t DHR t DHZ Memory READ Memory WRITE CY7C53150 CY7C53120 / Address Address DDW t DDZ DDW t DHW Data Out Memory WRITE DDZ t DHZ t DHW Data Out Page ...

Page 9

... ’ lta lta trip + ] - [V trip -] Figure 8. Differential Receiver Input Hysteresis Voltage Measurement Waveforms [23] Ordering Information Flash Part Number (KB) CY7C53150-20AI 0.5 [24] CY7C53120E2-10SI 2 [26] CY7C53120E4-40SI 4 [24] CY7C53120E2-10AI 2 [26] CY7C53120E4-40AI 4 Notes: 23. All parts contain 2KB of SRAM. 24. CY7C53120E2 firmware is bit-for-bit identical with Motorola MC143120E2 firmware. ...

Page 10

... Package Diagrams 64-lead Thin Plastic Quad Flat Pack (14 × 14 × 1.4 mm) A65 Document #: 38-10001 Rev. *D 44-lead Thin Plastic Quad Flat Pack A44 CY7C53150 CY7C53120 51-85064-B 51-85046-B Page ...

Page 11

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 32-lead (450-mil) Molded SOIC S34 CY7C53150 CY7C53120 51-85081-A ...

Page 12

... Document History Page Document Title: CY7C53150/CY7C53120 Neuron Document Number: 38-10001 REV. ECN NO. Issue Date ** 111472 11/28/01 *A 111990 02/06/02 *B 114465 04/24/02 *C 115269 04/26/02 *D 124450 03/25/03 Document #: 38-10001 Rev. *D ® Chip Network Processor Orig. of Change Description of Change DSG Change from Spec number: 38-00891 to 38-10001 CFB Changed the max ...

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