GCIXP1250BA 837411 Intel, GCIXP1250BA 837411 Datasheet - Page 82

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GCIXP1250BA 837411

Manufacturer Part Number
GCIXP1250BA 837411
Description
Manufacturer
Intel
Datasheet

Specifications of GCIXP1250BA 837411

Lead Free Status / Rohs Status
Supplier Unconfirmed
Intel
4.3.7.2
82
Figure 20. IX Bus Signals Timing
Table 45. IX Bus Signals Timing
®
IXP1250 Network Processor
IX Bus Signals Timing
1. Capacitive loading effects on signal lines are shown in
2. The parameter specified is guaranteed by design in a minimally configured system environment.
T
T
T
T
T
T
T
Symbol
su
on
onxf
off
offxf
val
h
Clock to output delay
Data input setup time before
clock
Data input hold time from
clock
Float to FDAT[63:0] and
FBE_L[7:0] data driven delay
from clock
Float to data driven from
clock, excluding FDAT[63:0]
and FBE_L[7:0]
FDAT[63:0] and FBE_L[7:0]
driven to float delay from
clock
Data driven to float delay,
excluding FDAT[63:0] and
FBE_L[7:0]
2
Outputs
Inputs
Parameter
CLK
2
2
2
T
T
on
val(max)
1.0
4.0
1.0
1.5
2.5
---
---
MHz
66
(IX Bus Speed)
Minimum
Table
1.0
4.0
1.0
1.5
2.5
---
---
MHz
85
46.
T
su
0.5
3.25
0.25
1.5
2.5
---
---
MHz
104
T
7.0
---
---
--
--
7.5
7.0
MHz
h
66
(IX Bus Speed)
T
off
Maximum
7.0
---
---
--
--
7.5
7.0
MHz
T
85
val(min)
5.75
---
---
--
--
7.5
7.0
MHz
104
Unit
ns
ns
ns
ns
ns
ns
ns
Datasheet
0 pF load
Condition
A8559-01
1

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