IXP2400 Intel, IXP2400 Datasheet - Page 16

• Manufacturer Part Number: IXP2400
• Manufacturer: Intel

Specifications of IXP2400

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel
2.3.6
2.3.7
2.4
16
®
IXP2400 Network Processor
Context and a working copy of each. When a Context goes to Sleep state, the value of the working
copies is put into the Context’s copy of LM_Addr. When the Context returns to the Executing state,
the value in its copy of LM_Addr are put into the working copies. The choice of LM_Addr_0 or
LM_Addr_1 is selected in the instruction.
CRC Unit
The CRC Unit operates in parallel with the Execution Datapath. It takes two operands, performs a
CRC operation, and writes back a result. CRC-16 and CRC-32 are supported. One of the operands
is the CRC_Remainder Local CSR, and the other is a GPR, Transfer In Register, Next Neighbor, or
LM, specified in the instruction and passed through the Execution Datapath to the CRC Unit. The
instruction specifies the CRC operation type.
Event Signals
Event Signals are used to coordinate a program with completion of external events. For example,
when a ME issues a command to an external unit to read data (which will be written into a
Transfer_In register), the program must ensure that it does not try to use the data until the external
unit has written it. There is no hardware mechanism to flag that a register write is pending, and then
prevent the program from using it. Instead the coordination is under software control, with
hardware support.
When the program issues the command to the external event, it can request that the external unit
supply an indication (called an Event Signal) that the command has been completed. There are 15
Event Signals per Context that can be used, and Local CSRs per Context to track which Event
Signals are pending and which have been returned. The Event Signals can be used to move a
Context from Sleep state to Ready state, or alternatively, the program can test and branch on the
status of Event Signals. Event Signals can be set in nine different ways:
DDR SDRAM
The DDR Memory Controller controls the off-chip DRAM. The DDR Controller contains the
mechanism that allows the other functional units to access the single channel of DRAM present in
the IXP2400. DRAM sizes of 64 MB, 128 MB, 512 MB and 1 GB are supported. Single-sided or
double-sided DIMMs are supported. The IXP2400 only supports 4-bank DDR devices.
shows the supported configurations. The addressing capability of the DDR Controller is 2 GB. The
address space always appears contiguous to software executing on the IXP2400. If less than 2 GB
1. When data is written into S_Transfer_In Registers (part of S_Push_ID input)
2. When data is written into D_Transfer_In Registers (part of D_Push_ID input)
3. When data is taken from S_Transfer_Out Registers (part of S_Pull_ID input)
4. When data is taken from D_Transfer_Out Registers (part of D_Pull_ID input)
5. On InterThread_Sig_In input
6. On NN_Sig_In input
7. On Prev_Sig_In input
8. On write to Same_ME_Signal Local CSR
9. By Internal Timer
Datasheet
Table 1