MT9HVF12872RHY-667G1 Micron Technology Inc, MT9HVF12872RHY-667G1 Datasheet - Page 21

• Manufacturer Part Number: MT9HVF12872RHY-667G1
• Manufacturer: Micron Technology Inc

Specifications of MT9HVF12872RHY-667G1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 200VLP SORDIMM
• Device Core Size: 72b
• Organization: 128Mx72
• Total Density: 1GByte
• Chip Density: 1Gb
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.215A
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

Serial Presence-Detect
Table 29:
Table 30:
Serial Presence-Detect Data
PDF: 09005aef82882ca3/Source: 09005aef82882c52
HVF9C64_128x72RH.fm - Rev. C 1/09 EN
Parameter/Condition
Parameter/Condition
Supply voltage with temperature sensor option
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: Iout = 3mA
SPD input leakage current: Vin = GND to Vdd
SPD output leakage current: V
SPD standby current
Power supply current, READ: SCL clock frequency = 100 kHz
Power supply current, WRITE: SCL clock frequency = 100 kHz
Average temperature sensor current
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to Vss
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
Notes:
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
For the latest serial presence-detect data, refer to Micron's SPD page:
www.micron.com/SPD
OUT
the falling or rising edge of SDA.
sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resis-
tance, and the EEPROM does not respond to its slave address.
512MB, 1GB (x72, ECC, SR): 200-Pin DDR2 SDRAM VLP SORDIMM
= GND to Vdd
SS
21
t
t
Symbol
t
t
t
WRC) is the time from a valid stop condition of a write
t
HD:DAT
HD:STA
SU:DAT
SU:STO
SU:STA
Symbol
t
t
t
Vddspd
t
HIGH
LOW
f
WRC
t
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BUF
SCL
AA
DH
t
Iccw
t
t
Iccr
Vih
Vol
R
F
Vil
Ilo
Isb
I
Ili
–
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
0
–
–
–
–
–
Min
–0.6
0.10
0.05
3.0
2.1
1.6
0.4
–
2
–
Serial Presence-Detect
Max
300
400
0.9
0.3
50
10
–
–
–
–
–
–
–
–
–
©2007 Micron Technology, Inc. All rights reserved.
Vddspd + 0.5
Max
500
3.6
0.8
0.4
3
3
4
1
3
Units
kHz
ms
µs
µs
µs
µs
µs
ns
ns
µs
µs
ns
µs
µs
ns
Units
Notes
mA
mA
µA
µA
µA
µA
V
V
V
V
1
2
2
3
4