AD9779BSVZ Analog Devices Inc, AD9779BSVZ Datasheet - Page 14

IC DAC 16BIT DUAL 1GSPS 100TQFP

AD9779BSVZ

Manufacturer Part Number
AD9779BSVZ
Description
IC DAC 16BIT DUAL 1GSPS 100TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9779BSVZ

Data Interface
Serial
Number Of Bits
16
Number Of Converters
2
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
300mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Resolution (bits)
16bit
Sampling Rate
1GSPS
Input Channel Type
Parallel
Digital Ic Case Style
QFP
No. Of Pins
160
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9779A-EBZ - BOARD EVALUATION FOR AD9779A
Settling Time
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD9776/AD9778/AD9779
Pin
No.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Mnemonic
DVDD18
DGND
P2D<12>
P2D<11>
P2D<10>
P2D<9>
P2D<8>
P2D<7>
P2D<6>
P2D<5>
DVDD18
DGND
P2D<4>
P2D<3>
P2D<2>
P2D<1>
P2D<0>
DVDD18
DVDD33
SYNC_O−
SYNC_O+
DGND
PLL_LOCK
SPI_SDO
SPI_SDIO
SCLK
SPI_CSB
RESET
IRQ
AGND
IPTAT
1.8 V Digital Supply.
Digital Common.
1.8 V Digital Supply.
Digital Common.
1.8 V Digital Supply.
3.3 V Digital Supply.
Digital Common.
SPI Port Clock.
SPI Port Chip Select Bar.
Reset, Active High.
Analog Common.
Description
Port 2, Data Input D12.
Port 2, Data Input D11.
Port 2, Data Input D10.
Port 2, Data Input D9.
Port 2, Data Input D8.
Port 2, Data Input D7.
Port 2, Data Input D6.
Port 2, Data Input D5.
Port 2, Data Input D4.
Port 2, Data Input D3.
Port 2, Data Input D2.
Port 2, Data Input D1.
Port 2, Data Input D0 (LSB).
Differential Synchronization Output.
Differential Synchronization Output.
PLL Lock Indicator.
SPI Port Data Output.
SPI Port Data Input/Output.
Interrupt Request.
Factory Test Pin. Output current is
proportional to absolute temperature,
approximately 10 μA at 25°C with
approximately 20 nA/°C slope. This pin
should remain floating.
Rev. A | Page 14 of 56
Pin
No.
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
The combined differential clock input at the CLK+ and CLK– pins are referred
to as REFCLK.
Mnemonic
VREF
I120
AVDD33
AGND
AVDD33
AGND
AVDD33
AGND
AGND
OUT2_P
OUT2_N
AGND
AUX2_P
AUX2_N
AGND
AUX1_N
AUX1_P
AGND
OUT1_N
OUT1_P
AGND
AGND
AVDD33
AGND
AVDD33
AGND
AVDD33
Description
Voltage Reference Output.
120 μA Reference Current.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
Analog Common.
Differential DAC Current Output,
Channel 2.
Differential DAC Current Output,
Channel 2.
Analog Common.
Auxiliary DAC Current Output, Channel 2.
Auxiliary DAC Current Output, Channel 2.
Analog Common.
Auxiliary DAC Current Output, Channel 1.
Auxiliary DAC Current Output, Channel 1.
Analog Common.
Differential DAC Current Output,
Channel 1.
Differential DAC Current Output,
Channel 1.
Analog Common.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.
Analog Common.
3.3 V Analog Supply.

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